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* [PATCH 0/5] imx8q video decoder/encoder driver
@ 2021-05-31  2:51 Ming Qian
  2021-05-31  2:51 ` [PATCH 1/5] dt-bindings: media: imx8q: add imx video codec bindings Ming Qian
                   ` (4 more replies)
  0 siblings, 5 replies; 10+ messages in thread
From: Ming Qian @ 2021-05-31  2:51 UTC (permalink / raw)
  To: mchehab, shawnguo, robh+dt, s.hauer
  Cc: hverkuil-cisco, kernel, festevam, linux-imx, aisheng.dong,
	linux-media, linux-kernel, devicetree, linux-arm-kernel

Hi all,

This patch series adds support for
the imx8q video encoder and decoder
via the VPU block present in imx8q platforms.
Currently, support for IMX8QXP and IMX8QM is included.

It features decoding for the following formats:
- H.264
- HEVC
- MPEG4
- MPEG2
- MJPEG
- VC1
- VP8
- AVS

It features encoding for the following formats:
- H.264

The driver creates a separate device node for
the encoder and decoder.

Compliance
==========
# v4l2-compliance -d /dev/video0
v4l2-compliance SHA: not available
, 64 bits, 64-bit time_t

Compliance test for vpu B0 device /dev/video0:

Driver Info:
	Driver name      : vpu B0
	Card type        : imx vpu decoder
	Bus info         : platform: imx8q-vpu
	Driver version   : 5.10.35
	Capabilities     : 0x84204000
		Video Memory-to-Memory Multiplanar
		Streaming
		Extended Pix Format
		Device Capabilities
	Device Caps      : 0x04204000
		Video Memory-to-Memory Multiplanar
		Streaming
		Extended Pix Format

Required ioctls:
	test VIDIOC_QUERYCAP: OK

Allow for multiple opens:
	test second /dev/video0 open: OK
	test VIDIOC_QUERYCAP: OK
	test VIDIOC_G/S_PRIORITY: OK
	test for unlimited opens: OK

	test invalid ioctls: OK
Debug ioctls:
	test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)
	test VIDIOC_LOG_STATUS: OK (Not Supported)

Input ioctls:
	test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
	test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
	test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
	test VIDIOC_ENUMAUDIO: OK (Not Supported)
	test VIDIOC_G/S/ENUMINPUT: OK (Not Supported)
	test VIDIOC_G/S_AUDIO: OK (Not Supported)
	Inputs: 0 Audio Inputs: 0 Tuners: 0

Output ioctls:
	test VIDIOC_G/S_MODULATOR: OK (Not Supported)
	test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
	test VIDIOC_ENUMAUDOUT: OK (Not Supported)
	test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
	test VIDIOC_G/S_AUDOUT: OK (Not Supported)
	Outputs: 0 Audio Outputs: 0 Modulators: 0

Input/Output configuration ioctls:
	test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
	test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported)
	test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported)
	test VIDIOC_G/S_EDID: OK (Not Supported)

Control ioctls:
	test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK
	test VIDIOC_QUERYCTRL: OK
	test VIDIOC_G/S_CTRL: OK
	test VIDIOC_G/S/TRY_EXT_CTRLS: OK
	test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK
	test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)
	Standard Controls: 3 Private Controls: 2

Format ioctls:
	test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK
	test VIDIOC_G/S_PARM: OK (Not Supported)
	test VIDIOC_G_FBUF: OK (Not Supported)
	test VIDIOC_G_FMT: OK
	test VIDIOC_TRY_FMT: OK
	test VIDIOC_S_FMT: OK
	test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
	test Cropping: OK
	test Composing: OK
	test Scaling: OK

Codec ioctls:
	test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported)
	test VIDIOC_G_ENC_INDEX: OK (Not Supported)
	test VIDIOC_(TRY_)DECODER_CMD: OK

Buffer ioctls:
	test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK
	test VIDIOC_EXPBUF: OK
	test Requests: OK (Not Supported)

Total for vpu b0 device /dev/video0: 45, Succeeded: 45, Failed: 0, Warnings: 0

# v4l2-compliance -d /dev/video1
v4l2-compliance SHA: not available
, 64 bits, 64-bit time_t

Compliance test for imx vpu encoder device /dev/video1:

Driver Info:
	Driver name      : imx vpu encoder
	Card type        : imx vpu encoder
	Bus info         : platform: imx8q-vpu
	Driver version   : 5.10.35
	Capabilities     : 0x84204000
		Video Memory-to-Memory Multiplanar
		Streaming
		Extended Pix Format
		Device Capabilities
	Device Caps      : 0x04204000
		Video Memory-to-Memory Multiplanar
		Streaming
		Extended Pix Format
	Detected Stateful Encoder

Required ioctls:
	test VIDIOC_QUERYCAP: OK

Allow for multiple opens:
	test second /dev/video1 open: OK
	test VIDIOC_QUERYCAP: OK
	test VIDIOC_G/S_PRIORITY: OK
	test for unlimited opens: OK

	test invalid ioctls: OK
Debug ioctls:
	test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)
	test VIDIOC_LOG_STATUS: OK (Not Supported)

Input ioctls:
	test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
	test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
	test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
	test VIDIOC_ENUMAUDIO: OK (Not Supported)
	test VIDIOC_G/S/ENUMINPUT: OK (Not Supported)
	test VIDIOC_G/S_AUDIO: OK (Not Supported)
	Inputs: 0 Audio Inputs: 0 Tuners: 0

Output ioctls:
	test VIDIOC_G/S_MODULATOR: OK (Not Supported)
	test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
	test VIDIOC_ENUMAUDOUT: OK (Not Supported)
	test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
	test VIDIOC_G/S_AUDOUT: OK (Not Supported)
	Outputs: 0 Audio Outputs: 0 Modulators: 0

Input/Output configuration ioctls:
	test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
	test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported)
	test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported)
	test VIDIOC_G/S_EDID: OK (Not Supported)

Control ioctls:
	test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK
	test VIDIOC_QUERYCTRL: OK
	test VIDIOC_G/S_CTRL: OK
	test VIDIOC_G/S/TRY_EXT_CTRLS: OK
	test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK
	test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)
	Standard Controls: 20 Private Controls: 0

Format ioctls:
	test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK
	test VIDIOC_G/S_PARM: OK
	test VIDIOC_G_FBUF: OK (Not Supported)
	test VIDIOC_G_FMT: OK
	test VIDIOC_TRY_FMT: OK
	test VIDIOC_S_FMT: OK
	test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
	test Cropping: OK
	test Composing: OK (Not Supported)
	test Scaling: OK (Not Supported)

Codec ioctls:
	test VIDIOC_(TRY_)ENCODER_CMD: OK
	test VIDIOC_G_ENC_INDEX: OK (Not Supported)
	test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported)

Buffer ioctls:
	test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK
	test VIDIOC_EXPBUF: OK
	test Requests: OK (Not Supported)

Total for imx vpu encoder device /dev/video1: 45, Succeeded: 45, Failed: 0, Warnings: 0

Ming Qian (5):
  dt-bindings: media: imx8q: add imx video codec bindings
  media: v4l: add some definition of v4l2
    colorspace/xfer_func/ycbcr_encoding
  media: imx: imx8q: add v4l2 m2m video codec driver
  ARM64: dts: freescale: imx8q: add imx vpu codec entries
  firmware: imx: scu-pd: imx8q: add vpu mu resources

 .../bindings/media/nxp,imx8q-vpu.yaml         |  201 ++
 .../arm64/boot/dts/freescale/imx8-ss-vpu.dtsi |   76 +
 arch/arm64/boot/dts/freescale/imx8qxp-mek.dts |   22 +
 arch/arm64/boot/dts/freescale/imx8qxp.dtsi    |   27 +
 drivers/firmware/imx/scu-pd.c                 |    4 +
 drivers/media/platform/Kconfig                |    2 +
 drivers/media/platform/Makefile               |    2 +
 drivers/media/platform/imx/Kconfig            |   19 +
 drivers/media/platform/imx/Makefile           |    1 +
 drivers/media/platform/imx/vpu-8q/Makefile    |   23 +
 drivers/media/platform/imx/vpu-8q/vdec.c      | 1783 +++++++++++++++++
 drivers/media/platform/imx/vpu-8q/venc.c      | 1411 +++++++++++++
 drivers/media/platform/imx/vpu-8q/vpu.h       |  339 ++++
 drivers/media/platform/imx/vpu-8q/vpu_cmds.c  |  443 ++++
 drivers/media/platform/imx/vpu-8q/vpu_cmds.h  |   34 +
 drivers/media/platform/imx/vpu-8q/vpu_codec.h |   77 +
 drivers/media/platform/imx/vpu-8q/vpu_color.c |  201 ++
 drivers/media/platform/imx/vpu-8q/vpu_core.c  |  923 +++++++++
 drivers/media/platform/imx/vpu-8q/vpu_core.h  |   26 +
 drivers/media/platform/imx/vpu-8q/vpu_dbg.c   |  505 +++++
 drivers/media/platform/imx/vpu-8q/vpu_defs.h  |  194 ++
 .../media/platform/imx/vpu-8q/vpu_dev_imx8q.c |   82 +
 drivers/media/platform/imx/vpu-8q/vpu_drv.c   |  248 +++
 .../media/platform/imx/vpu-8q/vpu_helpers.c   |  405 ++++
 .../media/platform/imx/vpu-8q/vpu_helpers.h   |   80 +
 drivers/media/platform/imx/vpu-8q/vpu_imx8q.c |  227 +++
 drivers/media/platform/imx/vpu-8q/vpu_imx8q.h |  125 ++
 drivers/media/platform/imx/vpu-8q/vpu_log.h   |   53 +
 .../media/platform/imx/vpu-8q/vpu_malone.c    | 1744 ++++++++++++++++
 .../media/platform/imx/vpu-8q/vpu_malone.h    |   51 +
 drivers/media/platform/imx/vpu-8q/vpu_mbox.c  |  135 ++
 drivers/media/platform/imx/vpu-8q/vpu_mbox.h  |   25 +
 drivers/media/platform/imx/vpu-8q/vpu_msgs.c  |  420 ++++
 drivers/media/platform/imx/vpu-8q/vpu_msgs.h  |   23 +
 drivers/media/platform/imx/vpu-8q/vpu_rpc.c   |  266 +++
 drivers/media/platform/imx/vpu-8q/vpu_rpc.h   |  472 +++++
 drivers/media/platform/imx/vpu-8q/vpu_v4l2.c  |  730 +++++++
 drivers/media/platform/imx/vpu-8q/vpu_v4l2.h  |   56 +
 .../media/platform/imx/vpu-8q/vpu_windsor.c   | 1253 ++++++++++++
 .../media/platform/imx/vpu-8q/vpu_windsor.h   |   48 +
 include/linux/imx_vpu.h                       |   19 +
 include/uapi/linux/imx_vpu.h                  |  120 ++
 include/uapi/linux/videodev2.h                |   30 +
 43 files changed, 12925 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
 create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi
 create mode 100644 drivers/media/platform/imx/Kconfig
 create mode 100644 drivers/media/platform/imx/Makefile
 create mode 100644 drivers/media/platform/imx/vpu-8q/Makefile
 create mode 100644 drivers/media/platform/imx/vpu-8q/vdec.c
 create mode 100644 drivers/media/platform/imx/vpu-8q/venc.c
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu.h
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_cmds.c
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_cmds.h
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_codec.h
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_color.c
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_core.c
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_core.h
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_dbg.c
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_defs.h
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_dev_imx8q.c
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_drv.c
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_helpers.c
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_helpers.h
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_imx8q.c
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_imx8q.h
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_log.h
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_malone.c
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_malone.h
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_mbox.c
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_mbox.h
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_msgs.c
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_msgs.h
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_rpc.c
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_rpc.h
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_v4l2.c
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_v4l2.h
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_windsor.c
 create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_windsor.h
 create mode 100644 include/linux/imx_vpu.h
 create mode 100644 include/uapi/linux/imx_vpu.h

-- 
2.31.1


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linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH 1/5] dt-bindings: media: imx8q: add imx video codec bindings
  2021-05-31  2:51 [PATCH 0/5] imx8q video decoder/encoder driver Ming Qian
@ 2021-05-31  2:51 ` Ming Qian
  2021-05-31 14:43   ` Nicolas Dufresne
  2021-06-01 13:32   ` Rob Herring
  2021-05-31  2:51 ` [PATCH 2/5] media: v4l: add some definition of v4l2 colorspace/xfer_func/ycbcr_encoding Ming Qian
                   ` (3 subsequent siblings)
  4 siblings, 2 replies; 10+ messages in thread
From: Ming Qian @ 2021-05-31  2:51 UTC (permalink / raw)
  To: mchehab, shawnguo, robh+dt, s.hauer
  Cc: hverkuil-cisco, kernel, festevam, linux-imx, aisheng.dong,
	linux-media, linux-kernel, devicetree, linux-arm-kernel

Add devicetree binding documentation for IMX8Q Video Processing Unit IP

Signed-off-by: Ming Qian <ming.qian@nxp.com>
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
---
 .../bindings/media/nxp,imx8q-vpu.yaml         | 201 ++++++++++++++++++
 1 file changed, 201 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml

diff --git a/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
new file mode 100644
index 000000000000..97e428dbfdbe
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
@@ -0,0 +1,201 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/nxp,imx8q-vpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX8Q video encode and decode accelerators
+
+maintainers:
+  - ming_qian <ming.qian@nxp.com>
+  - Shijie Qin <shijie.qin@nxp.com>
+
+description: |-
+  The Amphion MXC video encode and decode accelerators present on NXP i.MX8Q SoCs.
+
+allOf:
+  - $ref: /schemas/simple-bus.yaml#
+
+properties:
+  compatible:
+    items:
+      - enum:
+        - nxp,imx8qxp-vpu
+        - nxp,imx8qm-vpu
+
+  reg:
+    maxItems: 1
+
+  power-domains:
+    maxItems: 1
+
+  memory-region:
+    description:
+      Phandle to a node describing reserved memory used by VPU.
+      (see bindings/reserved-memory/reserved-memory.txt)
+
+  vpu_lpcg:
+    description:
+      This is vpu Low-Power Clock Gate (LPCG) module.
+
+  mu_m0:
+    description:
+      Each vpu core correspond a MU node, which used for communication between
+      driver and firmware. Implement via mailbox on driver.
+
+    vpu_core:
+      type: object
+      additionalProperties: false
+      description:
+        Each core correspond a decoder or encoder, need to configure them
+        separately.
+
+      properties:
+        compatible:
+          oneOf:
+            - const: nxp,imx8q-vpu-decoder
+            - const: nxp,imx8q-vpu-encoder
+
+        reg:
+          maxItems: 1
+
+        power-domains:
+          maxItems: 1
+
+        mbox-names:
+            - const: tx0
+            - const: tx1
+            - const: rx
+
+        mboxes:
+          maxItems: 3
+          description:
+            List of phandle of 2 MU channels for tx, 1 MU channel for rx.
+
+        boot-region:
+          description:
+            Phandle to a node describing reserved memory used by firmware
+            loading.
+
+        rpc-region:
+          description:
+            Phandle to a node describing reserved memory used by RPC shared
+            memory between firmware and driver.
+
+        print-offset:
+          description:
+            The memory offset from RPC address, used by reserve firmware log.
+
+        id:
+          description: Index of vpu core.
+
+      required:
+      - compatible
+      - reg
+      - power-domains
+      - mbox-names
+      - mboxes
+      - boot-region
+      - rpc-region
+      - print-offset
+      - id
+
+
+required:
+  - compatible
+  - reg
+  - power-domains
+  - memory-region
+  - vpu_lpcg
+  - mu_m0
+  - vpu_core
+
+examples:
+  # Device node example for i.MX8QM platform:
+  - |
+    #include <dt-bindings/firmware/imx/rsrc.h>
+
+    vpu: vpu-bus@2c000000 {
+      compatible = "nxp,imx8qm-vpu", "simple-bus";
+      ranges = <0x2c000000 0x2c000000 0x2000000>;
+      reg = <0x2c000000 0x1000000>;
+      #address-cells = <1>;
+      #size-cells = <1>;
+      power-domains = <&pd IMX_SC_R_VPU>;
+      memory-region = <&vpu_reserved>;
+
+      vpu_lpcg: clock-controller@2c000000 {
+        compatible = "fsl,imx8qxp-lpcg-vpu";
+        reg = <0x2c000000 0x2000000>;
+        #clock-cells = <1>;
+        status = "disabled";
+      };
+
+      mu_m0: mailbox@2d000000 {
+        compatible = "fsl,imx6sx-mu";
+        reg = <0x2d000000 0x20000>;
+        interrupts = <0 472 4>;
+        #mbox-cells = <2>;
+        power-domains = <&pd IMX_SC_R_VPU_MU_0>;
+      };
+
+      mu1_m0: mailbox@2d020000 {
+        compatible = "fsl,imx6sx-mu";
+        reg = <0x2d020000 0x20000>;
+        interrupts = <0 473 4>;
+        #mbox-cells = <2>;
+        power-domains = <&pd IMX_SC_R_VPU_MU_1>;
+      };
+
+      mu2_m0: mailbox@2d040000 {
+        compatible = "fsl,imx6sx-mu";
+        reg = <0x2d040000 0x20000>;
+        interrupts = <0 474 4>;
+        #mbox-cells = <2>;
+        power-domains = <&pd IMX_SC_R_VPU_MU_2>;
+      };
+
+      vpu_core0: vpu_decoder@2d080000 {
+        compatible = "nxp,imx8q-vpu-decoder";
+        reg = <0x2d080000 0x10000>;
+        power-domains = <&pd IMX_SC_R_VPU_DEC_0>;
+        mbox-names = "tx0", "tx1", "rx";
+        mboxes = <&mu_m0 0 0
+                  &mu_m0 0 1
+                  &mu_m0 1 0>;
+        boot-region = <&decoder_boot>;
+        rpc-region = <&decoder_rpc>;
+        print-offset = <0x180000>;
+        id = <0>;
+      };
+
+      vpu_core1: vpu_encoder@2d090000 {
+        compatible = "nxp,imx8q-vpu-encoder";
+        reg = <0x2d090000 0x10000>;
+        power-domains = <&pd IMX_SC_R_VPU_ENC_0>;
+        mbox-names = "tx0", "tx1", "rx";
+        mboxes = <&mu1_m0 0 0
+                  &mu1_m0 0 1
+                  &mu1_m0 1 0>;
+        boot-region = <&encoder1_boot>;
+        rpc-region = <&encoder1_rpc>;
+        print-offset = <0x80000>;
+        id = <1>;
+      };
+
+      vpu_core2: vpu_encoder@2d0a0000 {
+        reg = <0x2d0a0000 0x10000>;
+        compatible = "nxp,imx8q-vpu-encoder";
+        power-domains = <&pd IMX_SC_R_VPU_ENC_1>;
+        mbox-names = "tx0", "tx1", "rx";
+        mboxes = <&mu2_m0 0 0
+                  &mu2_m0 0 1
+                  &mu2_m0 1 0>;
+        boot-region = <&encoder2_boot>;
+        rpc-region = <&encoder2_rpc>;
+        id = <2>;
+      };
+    };
+
+...
-- 
2.31.1


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^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 2/5] media: v4l: add some definition of v4l2 colorspace/xfer_func/ycbcr_encoding
  2021-05-31  2:51 [PATCH 0/5] imx8q video decoder/encoder driver Ming Qian
  2021-05-31  2:51 ` [PATCH 1/5] dt-bindings: media: imx8q: add imx video codec bindings Ming Qian
@ 2021-05-31  2:51 ` Ming Qian
  2021-05-31  2:51 ` [PATCH 4/5] ARM64: dts: freescale: imx8q: add imx vpu codec entries Ming Qian
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 10+ messages in thread
From: Ming Qian @ 2021-05-31  2:51 UTC (permalink / raw)
  To: mchehab, shawnguo, robh+dt, s.hauer
  Cc: hverkuil-cisco, kernel, festevam, linux-imx, aisheng.dong,
	linux-media, linux-kernel, devicetree, linux-arm-kernel

Some definition of colorspace/xfer_func/ycbcr_encoding
are defined in ISO, but missed in V4L2,
so add some definition according VPU driver's requirement

Signed-off-by: Ming Qian <ming.qian@nxp.com>
Reviewed-by: Shijie Qin <shijie.qin@nxp.com>
---
 include/uapi/linux/videodev2.h | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 534eaa4d39bc..545f2c329bc9 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -247,6 +247,12 @@ enum v4l2_colorspace {
 
 	/* DCI-P3 colorspace, used by cinema projectors */
 	V4L2_COLORSPACE_DCI_P3        = 12,
+
+	/* Generic film (colour filters using Illuminant C) */
+	V4L2_COLORSPACE_GENERIC_FILM  = 13,
+
+	/* SMPTE ST 428-1 */
+	V4L2_COLORSPACE_ST428         = 14,
 };
 
 /*
@@ -276,6 +282,20 @@ enum v4l2_xfer_func {
 	 * V4L2_COLORSPACE_RAW: V4L2_XFER_FUNC_NONE
 	 *
 	 * V4L2_COLORSPACE_DCI_P3: V4L2_XFER_FUNC_DCI_P3
+	 *
+	 * V4L2_XFER_FUNC_LINEAR: Linear transfer characteristics
+	 *
+	 * V4L2_XFER_FUNC_GAMMA22: Assumed display gamma 2.2
+	 *
+	 * V4L2_XFER_FUNC_GAMMA28: Assumed display gamma 2.8
+	 *
+	 * V4L2_XFER_FUNC_HLG: STD-B67, Rec. ITU-R BT.2100-2 hybrid-log-gamma
+	 *
+	 * V4L2_XFER_FUNC_XVYCC: IEC 61966-2-4
+	 *
+	 * V4L2_XFER_FUNC_BT1361: Rec. ITU-R BT.1361-0 extended colour gamut
+	 *
+	 * V4L2_XFER_FUNC_ST428: SMPTE ST 428-1
 	 */
 	V4L2_XFER_FUNC_DEFAULT     = 0,
 	V4L2_XFER_FUNC_709         = 1,
@@ -285,6 +305,13 @@ enum v4l2_xfer_func {
 	V4L2_XFER_FUNC_NONE        = 5,
 	V4L2_XFER_FUNC_DCI_P3      = 6,
 	V4L2_XFER_FUNC_SMPTE2084   = 7,
+	V4L2_XFER_FUNC_LINEAR      = 8,
+	V4L2_XFER_FUNC_GAMMA22     = 9,
+	V4L2_XFER_FUNC_GAMMA28     = 10,
+	V4L2_XFER_FUNC_HLG         = 11,
+	V4L2_XFER_FUNC_XVYCC       = 12,
+	V4L2_XFER_FUNC_BT1361      = 13,
+	V4L2_XFER_FUNC_ST428       = 14,
 };
 
 /*
@@ -345,6 +372,9 @@ enum v4l2_ycbcr_encoding {
 
 	/* SMPTE 240M -- Obsolete HDTV */
 	V4L2_YCBCR_ENC_SMPTE240M      = 8,
+
+	/* KR=0.30, KB=0.11 or equivalent */
+	V4L2_YCBCR_ENC_BT470_6M       = 9,
 };
 
 /*
-- 
2.31.1


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^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 4/5] ARM64: dts: freescale: imx8q: add imx vpu codec entries
  2021-05-31  2:51 [PATCH 0/5] imx8q video decoder/encoder driver Ming Qian
  2021-05-31  2:51 ` [PATCH 1/5] dt-bindings: media: imx8q: add imx video codec bindings Ming Qian
  2021-05-31  2:51 ` [PATCH 2/5] media: v4l: add some definition of v4l2 colorspace/xfer_func/ycbcr_encoding Ming Qian
@ 2021-05-31  2:51 ` Ming Qian
  2021-05-31  2:51 ` [PATCH 5/5] firmware: imx: scu-pd: imx8q: add vpu mu resources Ming Qian
  2021-07-20 14:48 ` [PATCH 0/5] imx8q video decoder/encoder driver Nicolas Dufresne
  4 siblings, 0 replies; 10+ messages in thread
From: Ming Qian @ 2021-05-31  2:51 UTC (permalink / raw)
  To: mchehab, shawnguo, robh+dt, s.hauer
  Cc: hverkuil-cisco, kernel, festevam, linux-imx, aisheng.dong,
	linux-media, linux-kernel, devicetree, linux-arm-kernel

Add the Video Processing Unit node for IMX8Q SoC.

Signed-off-by: Ming Qian <ming.qian@nxp.com>
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
---
 .../arm64/boot/dts/freescale/imx8-ss-vpu.dtsi | 76 +++++++++++++++++++
 arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 22 ++++++
 arch/arm64/boot/dts/freescale/imx8qxp.dtsi    | 27 +++++++
 3 files changed, 125 insertions(+)
 create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi
new file mode 100644
index 000000000000..6e9437f11817
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi
@@ -0,0 +1,76 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2021 NXP
+ *	Dong Aisheng <aisheng.dong@nxp.com>
+ */
+
+vpu: vpu-bus@2c000000 {
+	compatible = "simple-bus";
+	#address-cells = <1>;
+	#size-cells = <1>;
+	ranges = <0x2c000000 0x0 0x2c000000 0x2000000>;
+	reg = <0 0x2c000000 0 0x1000000>;
+	power-domains = <&pd IMX_SC_R_VPU>;
+	status = "disabled";
+
+	mu_m0: mailbox@2d000000 {
+		compatible = "fsl,imx6sx-mu";
+		reg = <0x2d000000 0x20000>;
+		interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
+		#mbox-cells = <2>;
+		power-domains = <&pd IMX_SC_R_VPU_MU_0>;
+		status = "okay";
+	};
+
+	mu1_m0: mailbox@2d020000 {
+		compatible = "fsl,imx6sx-mu";
+		reg = <0x2d020000 0x20000>;
+		interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>;
+		#mbox-cells = <2>;
+		power-domains = <&pd IMX_SC_R_VPU_MU_1>;
+		status = "okay";
+	};
+
+	mu2_m0: mailbox@2d040000 {
+		compatible = "fsl,imx6sx-mu";
+		reg = <0x2d040000 0x20000>;
+		interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>;
+		#mbox-cells = <2>;
+		power-domains = <&pd IMX_SC_R_VPU_MU_2>;
+		status = "disabled";
+	};
+
+	vpu_core0: vpu_decoder@2d080000 {
+		reg = <0x2d080000 0x10000>;
+		compatible = "nxp,imx8q-vpu-decoder";
+		power-domains = <&pd IMX_SC_R_VPU_DEC_0>;
+		mbox-names = "tx0", "tx1", "rx";
+		mboxes = <&mu_m0 0 0
+			&mu_m0 0 1
+			&mu_m0 1 0>;
+		id = <0>;
+		status = "disabled";
+	};
+	vpu_core1: vpu_encoder@2d090000 {
+		reg = <0x2d090000 0x10000>;
+		compatible = "nxp,imx8q-vpu-encoder";
+		power-domains = <&pd IMX_SC_R_VPU_ENC_0>;
+		mbox-names = "tx0", "tx1", "rx";
+		mboxes = <&mu1_m0 0 0
+			&mu1_m0 0 1
+			&mu1_m0 1 0>;
+		id = <1>;
+		status = "disabled";
+	};
+	vpu_core2: vpu_encoder@2d0a0000 {
+		reg = <0x2d0a0000 0x10000>;
+		compatible = "nxp,imx8q-vpu-encoder";
+		power-domains = <&pd IMX_SC_R_VPU_ENC_1>;
+		mbox-names = "tx0", "tx1", "rx";
+		mboxes = <&mu2_m0 0 0
+			&mu2_m0 0 1
+			&mu2_m0 1 0>;
+		id = <2>;
+		status = "disabled";
+	};
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
index 46437d3c7a04..d79eaa0a28ac 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
@@ -196,6 +196,28 @@ &usdhc2 {
 	status = "okay";
 };
 
+&vpu {
+	compatible = "nxp,imx8qxp-vpu", "simple-bus";
+	memory-region = <&vpu_reserved>;
+	status = "okay";
+};
+
+&vpu_core0 {
+	reg = <0x2d040000 0x10000>;
+	boot-region = <&decoder_boot>;
+	rpc-region = <&decoder_rpc>;
+	print-offset = <0x180000>;
+	status = "okay";
+};
+
+&vpu_core1 {
+	reg = <0x2d050000 0x10000>;
+	boot-region = <&encoder_boot>;
+	rpc-region = <&encoder_rpc>;
+	print-offset = <0x80000>;
+	status = "okay";
+};
+
 &iomuxc {
 	pinctrl_fec1: fec1grp {
 		fsl,pins = <
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index e46faac1fe71..74900686ec37 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -133,10 +133,34 @@ reserved-memory {
 		#size-cells = <2>;
 		ranges;
 
+		decoder_boot: decoder-boot@84000000 {
+			reg = <0 0x84000000 0 0x2000000>;
+			no-map;
+		};
+
+		encoder_boot: encoder-boot@86000000 {
+			reg = <0 0x86000000 0 0x200000>;
+			no-map;
+		};
+
+		decoder_rpc: decoder-rpc@0x92000000 {
+			reg = <0 0x92000000 0 0x200000>;
+			no-map;
+		};
+
+		encoder_rpc: encoder-rpc@0x92200000 {
+			reg = <0 0x92200000 0 0x100000>;
+			no-map;
+		};
 		dsp_reserved: dsp@92400000 {
 			reg = <0 0x92400000 0 0x2000000>;
 			no-map;
 		};
+		vpu_reserved: vpu_reserved@94400000 {
+			compatible = "shared-dma-pool";
+			no-map;
+			reg = <0 0x94400000 0 0x800000>;
+		};
 	};
 
 	pmu {
@@ -629,4 +653,7 @@ map0 {
 			};
 		};
 	};
+
+	/* sorted in register address */
+	#include "imx8-ss-vpu.dtsi"
 };
-- 
2.31.1


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^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 5/5] firmware: imx: scu-pd: imx8q: add vpu mu resources
  2021-05-31  2:51 [PATCH 0/5] imx8q video decoder/encoder driver Ming Qian
                   ` (2 preceding siblings ...)
  2021-05-31  2:51 ` [PATCH 4/5] ARM64: dts: freescale: imx8q: add imx vpu codec entries Ming Qian
@ 2021-05-31  2:51 ` Ming Qian
  2021-07-20 14:48 ` [PATCH 0/5] imx8q video decoder/encoder driver Nicolas Dufresne
  4 siblings, 0 replies; 10+ messages in thread
From: Ming Qian @ 2021-05-31  2:51 UTC (permalink / raw)
  To: mchehab, shawnguo, robh+dt, s.hauer
  Cc: hverkuil-cisco, kernel, festevam, linux-imx, aisheng.dong,
	linux-media, linux-kernel, devicetree, linux-arm-kernel

the vpu core depends on the mu resources.
if they're missed, the vpu can't work.

Signed-off-by: Ming Qian <ming.qian@nxp.com>
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
---
 drivers/firmware/imx/scu-pd.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c
index af3d6d9ead28..48bcc9355a7c 100644
--- a/drivers/firmware/imx/scu-pd.c
+++ b/drivers/firmware/imx/scu-pd.c
@@ -145,6 +145,10 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = {
 	{ "vpu-pid", IMX_SC_R_VPU_PID0, 8, true, 0 },
 	{ "vpu-dec0", IMX_SC_R_VPU_DEC_0, 1, false, 0 },
 	{ "vpu-enc0", IMX_SC_R_VPU_ENC_0, 1, false, 0 },
+	{ "vpu-enc1", IMX_SC_R_VPU_ENC_1, 1, false, 0 },
+	{ "vpu-mu0", IMX_SC_R_VPU_MU_0, 1, false, 0 },
+	{ "vpu-mu1", IMX_SC_R_VPU_MU_1, 1, false, 0 },
+	{ "vpu-mu2", IMX_SC_R_VPU_MU_2, 1, false, 0 },
 
 	/* GPU SS */
 	{ "gpu0-pid", IMX_SC_R_GPU_0_PID0, 4, true, 0 },
-- 
2.31.1


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^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH 1/5] dt-bindings: media: imx8q: add imx video codec bindings
  2021-05-31  2:51 ` [PATCH 1/5] dt-bindings: media: imx8q: add imx video codec bindings Ming Qian
@ 2021-05-31 14:43   ` Nicolas Dufresne
  2021-06-01  1:48     ` [EXT] " Ming Qian
  2021-06-01 13:32   ` Rob Herring
  1 sibling, 1 reply; 10+ messages in thread
From: Nicolas Dufresne @ 2021-05-31 14:43 UTC (permalink / raw)
  To: Ming Qian, mchehab, shawnguo, robh+dt, s.hauer
  Cc: hverkuil-cisco, kernel, festevam, linux-imx, aisheng.dong,
	linux-media, linux-kernel, devicetree, linux-arm-kernel

Le lundi 31 mai 2021 à 10:51 +0800, Ming Qian a écrit :
> Add devicetree binding documentation for IMX8Q Video Processing Unit IP
> 
> Signed-off-by: Ming Qian <ming.qian@nxp.com>
> Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
> Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
> ---
>  .../bindings/media/nxp,imx8q-vpu.yaml         | 201 ++++++++++++++++++
>  1 file changed, 201 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> 
> diff --git a/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> new file mode 100644
> index 000000000000..97e428dbfdbe
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> @@ -0,0 +1,201 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/nxp,imx8q-vpu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX8Q video encode and decode accelerators
> +
> +maintainers:
> +  - ming_qian <ming.qian@nxp.com>
> +  - Shijie Qin <shijie.qin@nxp.com>
> +
> +description: |-
> +  The Amphion MXC video encode and decode accelerators present on NXP i.MX8Q SoCs.

Hi, thanks for this work. Do you think it would be possible to give a version
for the Amphion design that is in used ? This is for the posterity and/or if
some non-NXP vendor needs to use this driver because it picked the same design.
Though form what I understood, Allegro acquired it, and might not be continuing
that model, it remains that is nicer if we document as much as we can, to give
maximum relevance to you rcontribution.

> +
> +allOf:
> +  - $ref: /schemas/simple-bus.yaml#
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +        - nxp,imx8qxp-vpu
> +        - nxp,imx8qm-vpu
> +
> +  reg:
> +    maxItems: 1
> +
> +  power-domains:
> +    maxItems: 1
> +
> +  memory-region:
> +    description:
> +      Phandle to a node describing reserved memory used by VPU.
> +      (see bindings/reserved-memory/reserved-memory.txt)
> +
> +  vpu_lpcg:
> +    description:
> +      This is vpu Low-Power Clock Gate (LPCG) module.
> +
> +  mu_m0:
> +    description:
> +      Each vpu core correspond a MU node, which used for communication between
> +      driver and firmware. Implement via mailbox on driver.
> +
> +    vpu_core:
> +      type: object
> +      additionalProperties: false
> +      description:
> +        Each core correspond a decoder or encoder, need to configure them
> +        separately.
> +
> +      properties:
> +        compatible:
> +          oneOf:
> +            - const: nxp,imx8q-vpu-decoder
> +            - const: nxp,imx8q-vpu-encoder
> +
> +        reg:
> +          maxItems: 1
> +
> +        power-domains:
> +          maxItems: 1
> +
> +        mbox-names:
> +            - const: tx0
> +            - const: tx1
> +            - const: rx
> +
> +        mboxes:
> +          maxItems: 3
> +          description:
> +            List of phandle of 2 MU channels for tx, 1 MU channel for rx.
> +
> +        boot-region:
> +          description:
> +            Phandle to a node describing reserved memory used by firmware
> +            loading.
> +
> +        rpc-region:
> +          description:
> +            Phandle to a node describing reserved memory used by RPC shared
> +            memory between firmware and driver.
> +
> +        print-offset:
> +          description:
> +            The memory offset from RPC address, used by reserve firmware log.
> +
> +        id:
> +          description: Index of vpu core.
> +
> +      required:
> +      - compatible
> +      - reg
> +      - power-domains
> +      - mbox-names
> +      - mboxes
> +      - boot-region
> +      - rpc-region
> +      - print-offset
> +      - id
> +
> +
> +required:
> +  - compatible
> +  - reg
> +  - power-domains
> +  - memory-region
> +  - vpu_lpcg
> +  - mu_m0
> +  - vpu_core
> +
> +examples:
> +  # Device node example for i.MX8QM platform:
> +  - |
> +    #include <dt-bindings/firmware/imx/rsrc.h>
> +
> +    vpu: vpu-bus@2c000000 {
> +      compatible = "nxp,imx8qm-vpu", "simple-bus";
> +      ranges = <0x2c000000 0x2c000000 0x2000000>;
> +      reg = <0x2c000000 0x1000000>;
> +      #address-cells = <1>;
> +      #size-cells = <1>;
> +      power-domains = <&pd IMX_SC_R_VPU>;
> +      memory-region = <&vpu_reserved>;
> +
> +      vpu_lpcg: clock-controller@2c000000 {
> +        compatible = "fsl,imx8qxp-lpcg-vpu";
> +        reg = <0x2c000000 0x2000000>;
> +        #clock-cells = <1>;
> +        status = "disabled";
> +      };
> +
> +      mu_m0: mailbox@2d000000 {
> +        compatible = "fsl,imx6sx-mu";
> +        reg = <0x2d000000 0x20000>;
> +        interrupts = <0 472 4>;
> +        #mbox-cells = <2>;
> +        power-domains = <&pd IMX_SC_R_VPU_MU_0>;
> +      };
> +
> +      mu1_m0: mailbox@2d020000 {
> +        compatible = "fsl,imx6sx-mu";
> +        reg = <0x2d020000 0x20000>;
> +        interrupts = <0 473 4>;
> +        #mbox-cells = <2>;
> +        power-domains = <&pd IMX_SC_R_VPU_MU_1>;
> +      };
> +
> +      mu2_m0: mailbox@2d040000 {
> +        compatible = "fsl,imx6sx-mu";
> +        reg = <0x2d040000 0x20000>;
> +        interrupts = <0 474 4>;
> +        #mbox-cells = <2>;
> +        power-domains = <&pd IMX_SC_R_VPU_MU_2>;
> +      };
> +
> +      vpu_core0: vpu_decoder@2d080000 {
> +        compatible = "nxp,imx8q-vpu-decoder";
> +        reg = <0x2d080000 0x10000>;
> +        power-domains = <&pd IMX_SC_R_VPU_DEC_0>;
> +        mbox-names = "tx0", "tx1", "rx";
> +        mboxes = <&mu_m0 0 0
> +                  &mu_m0 0 1
> +                  &mu_m0 1 0>;
> +        boot-region = <&decoder_boot>;
> +        rpc-region = <&decoder_rpc>;
> +        print-offset = <0x180000>;
> +        id = <0>;
> +      };
> +
> +      vpu_core1: vpu_encoder@2d090000 {
> +        compatible = "nxp,imx8q-vpu-encoder";
> +        reg = <0x2d090000 0x10000>;
> +        power-domains = <&pd IMX_SC_R_VPU_ENC_0>;
> +        mbox-names = "tx0", "tx1", "rx";
> +        mboxes = <&mu1_m0 0 0
> +                  &mu1_m0 0 1
> +                  &mu1_m0 1 0>;
> +        boot-region = <&encoder1_boot>;
> +        rpc-region = <&encoder1_rpc>;
> +        print-offset = <0x80000>;
> +        id = <1>;
> +      };
> +
> +      vpu_core2: vpu_encoder@2d0a0000 {
> +        reg = <0x2d0a0000 0x10000>;
> +        compatible = "nxp,imx8q-vpu-encoder";
> +        power-domains = <&pd IMX_SC_R_VPU_ENC_1>;
> +        mbox-names = "tx0", "tx1", "rx";
> +        mboxes = <&mu2_m0 0 0
> +                  &mu2_m0 0 1
> +                  &mu2_m0 1 0>;
> +        boot-region = <&encoder2_boot>;
> +        rpc-region = <&encoder2_rpc>;
> +        id = <2>;
> +      };
> +    };
> +
> +...



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^ permalink raw reply	[flat|nested] 10+ messages in thread

* RE: [EXT] Re: [PATCH 1/5] dt-bindings: media: imx8q: add imx video codec bindings
  2021-05-31 14:43   ` Nicolas Dufresne
@ 2021-06-01  1:48     ` Ming Qian
  0 siblings, 0 replies; 10+ messages in thread
From: Ming Qian @ 2021-06-01  1:48 UTC (permalink / raw)
  To: Nicolas Dufresne, mchehab, shawnguo, robh+dt, s.hauer
  Cc: hverkuil-cisco, kernel, festevam, dl-linux-imx, Aisheng Dong,
	linux-media, linux-kernel, devicetree, linux-arm-kernel

> Le lundi 31 mai 2021 à 10:51 +0800, Ming Qian a écrit :
> > Add devicetree binding documentation for IMX8Q Video Processing Unit
> > IP
> >
> > Signed-off-by: Ming Qian <ming.qian@nxp.com>
> > Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
> > Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
> > ---
> >  .../bindings/media/nxp,imx8q-vpu.yaml         | 201
> ++++++++++++++++++
> >  1 file changed, 201 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> > b/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> > new file mode 100644
> > index 000000000000..97e428dbfdbe
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> > @@ -0,0 +1,201 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +
> > +%YAML 1.2
> > +---
> > +$id:
> > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> >
> +cetree.org%2Fschemas%2Fmedia%2Fnxp%2Cimx8q-vpu.yaml%23&amp;data
> =04%7C
> >
> +01%7Cming.qian%40nxp.com%7C8420b2323fb844ffb7ab08d924428216%7
> C686ea1d
> >
> +3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637580690330635265%7CUnk
> nown%7CTW
> >
> +FpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJX
> VCI
> >
> +6Mn0%3D%7C1000&amp;sdata=5D8DWb4rqnARSlauGRZ838IHPH2mHJ6wG
> GKG4688gVM%
> > +3D&amp;reserved=0
> > +$schema:
> > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> >
> +cetree.org%2Fmeta-schemas%2Fcore.yaml%23&amp;data=04%7C01%7Cmin
> g.qian
> >
> +%40nxp.com%7C8420b2323fb844ffb7ab08d924428216%7C686ea1d3bc2b4
> c6fa92cd
> >
> +99c5c301635%7C0%7C0%7C637580690330635265%7CUnknown%7CTWFp
> bGZsb3d8eyJW
> >
> +IjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C
> 1000
> >
> +&amp;sdata=E0eIlneiBMKtz2EA%2FgFESzElq2k57nLt7u36J2n51gw%3D&amp
> ;reser
> > +ved=0
> > +
> > +title: NXP i.MX8Q video encode and decode accelerators
> > +
> > +maintainers:
> > +  - ming_qian <ming.qian@nxp.com>
> > +  - Shijie Qin <shijie.qin@nxp.com>
> > +
> > +description: |-
> > +  The Amphion MXC video encode and decode accelerators present on NXP
> i.MX8Q SoCs.
> 
> Hi, thanks for this work. Do you think it would be possible to give a version for
> the Amphion design that is in used ? This is for the posterity and/or if some
> non-NXP vendor needs to use this driver because it picked the same design.
> Though form what I understood, Allegro acquired it, and might not be
> continuing that model, it remains that is nicer if we document as much as we
> can, to give maximum relevance to you rcontribution.

Hi Nicolas,
  We will add the description of the version for the Amphion IP in the V2 patch, thank you for your advice

> 
> > +
> > +allOf:
> > +  - $ref: /schemas/simple-bus.yaml#
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - enum:
> > +        - nxp,imx8qxp-vpu
> > +        - nxp,imx8qm-vpu
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  power-domains:
> > +    maxItems: 1
> > +
> > +  memory-region:
> > +    description:
> > +      Phandle to a node describing reserved memory used by VPU.
> > +      (see bindings/reserved-memory/reserved-memory.txt)
> > +
> > +  vpu_lpcg:
> > +    description:
> > +      This is vpu Low-Power Clock Gate (LPCG) module.
> > +
> > +  mu_m0:
> > +    description:
> > +      Each vpu core correspond a MU node, which used for
> communication between
> > +      driver and firmware. Implement via mailbox on driver.
> > +
> > +    vpu_core:
> > +      type: object
> > +      additionalProperties: false
> > +      description:
> > +        Each core correspond a decoder or encoder, need to configure
> them
> > +        separately.
> > +
> > +      properties:
> > +        compatible:
> > +          oneOf:
> > +            - const: nxp,imx8q-vpu-decoder
> > +            - const: nxp,imx8q-vpu-encoder
> > +
> > +        reg:
> > +          maxItems: 1
> > +
> > +        power-domains:
> > +          maxItems: 1
> > +
> > +        mbox-names:
> > +            - const: tx0
> > +            - const: tx1
> > +            - const: rx
> > +
> > +        mboxes:
> > +          maxItems: 3
> > +          description:
> > +            List of phandle of 2 MU channels for tx, 1 MU channel for rx.
> > +
> > +        boot-region:
> > +          description:
> > +            Phandle to a node describing reserved memory used by
> firmware
> > +            loading.
> > +
> > +        rpc-region:
> > +          description:
> > +            Phandle to a node describing reserved memory used by RPC
> shared
> > +            memory between firmware and driver.
> > +
> > +        print-offset:
> > +          description:
> > +            The memory offset from RPC address, used by reserve
> firmware log.
> > +
> > +        id:
> > +          description: Index of vpu core.
> > +
> > +      required:
> > +      - compatible
> > +      - reg
> > +      - power-domains
> > +      - mbox-names
> > +      - mboxes
> > +      - boot-region
> > +      - rpc-region
> > +      - print-offset
> > +      - id
> > +
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - power-domains
> > +  - memory-region
> > +  - vpu_lpcg
> > +  - mu_m0
> > +  - vpu_core
> > +
> > +examples:
> > +  # Device node example for i.MX8QM platform:
> > +  - |
> > +    #include <dt-bindings/firmware/imx/rsrc.h>
> > +
> > +    vpu: vpu-bus@2c000000 {
> > +      compatible = "nxp,imx8qm-vpu", "simple-bus";
> > +      ranges = <0x2c000000 0x2c000000 0x2000000>;
> > +      reg = <0x2c000000 0x1000000>;
> > +      #address-cells = <1>;
> > +      #size-cells = <1>;
> > +      power-domains = <&pd IMX_SC_R_VPU>;
> > +      memory-region = <&vpu_reserved>;
> > +
> > +      vpu_lpcg: clock-controller@2c000000 {
> > +        compatible = "fsl,imx8qxp-lpcg-vpu";
> > +        reg = <0x2c000000 0x2000000>;
> > +        #clock-cells = <1>;
> > +        status = "disabled";
> > +      };
> > +
> > +      mu_m0: mailbox@2d000000 {
> > +        compatible = "fsl,imx6sx-mu";
> > +        reg = <0x2d000000 0x20000>;
> > +        interrupts = <0 472 4>;
> > +        #mbox-cells = <2>;
> > +        power-domains = <&pd IMX_SC_R_VPU_MU_0>;
> > +      };
> > +
> > +      mu1_m0: mailbox@2d020000 {
> > +        compatible = "fsl,imx6sx-mu";
> > +        reg = <0x2d020000 0x20000>;
> > +        interrupts = <0 473 4>;
> > +        #mbox-cells = <2>;
> > +        power-domains = <&pd IMX_SC_R_VPU_MU_1>;
> > +      };
> > +
> > +      mu2_m0: mailbox@2d040000 {
> > +        compatible = "fsl,imx6sx-mu";
> > +        reg = <0x2d040000 0x20000>;
> > +        interrupts = <0 474 4>;
> > +        #mbox-cells = <2>;
> > +        power-domains = <&pd IMX_SC_R_VPU_MU_2>;
> > +      };
> > +
> > +      vpu_core0: vpu_decoder@2d080000 {
> > +        compatible = "nxp,imx8q-vpu-decoder";
> > +        reg = <0x2d080000 0x10000>;
> > +        power-domains = <&pd IMX_SC_R_VPU_DEC_0>;
> > +        mbox-names = "tx0", "tx1", "rx";
> > +        mboxes = <&mu_m0 0 0
> > +                  &mu_m0 0 1
> > +                  &mu_m0 1 0>;
> > +        boot-region = <&decoder_boot>;
> > +        rpc-region = <&decoder_rpc>;
> > +        print-offset = <0x180000>;
> > +        id = <0>;
> > +      };
> > +
> > +      vpu_core1: vpu_encoder@2d090000 {
> > +        compatible = "nxp,imx8q-vpu-encoder";
> > +        reg = <0x2d090000 0x10000>;
> > +        power-domains = <&pd IMX_SC_R_VPU_ENC_0>;
> > +        mbox-names = "tx0", "tx1", "rx";
> > +        mboxes = <&mu1_m0 0 0
> > +                  &mu1_m0 0 1
> > +                  &mu1_m0 1 0>;
> > +        boot-region = <&encoder1_boot>;
> > +        rpc-region = <&encoder1_rpc>;
> > +        print-offset = <0x80000>;
> > +        id = <1>;
> > +      };
> > +
> > +      vpu_core2: vpu_encoder@2d0a0000 {
> > +        reg = <0x2d0a0000 0x10000>;
> > +        compatible = "nxp,imx8q-vpu-encoder";
> > +        power-domains = <&pd IMX_SC_R_VPU_ENC_1>;
> > +        mbox-names = "tx0", "tx1", "rx";
> > +        mboxes = <&mu2_m0 0 0
> > +                  &mu2_m0 0 1
> > +                  &mu2_m0 1 0>;
> > +        boot-region = <&encoder2_boot>;
> > +        rpc-region = <&encoder2_rpc>;
> > +        id = <2>;
> > +      };
> > +    };
> > +
> > +...
> 


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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH 1/5] dt-bindings: media: imx8q: add imx video codec bindings
  2021-05-31  2:51 ` [PATCH 1/5] dt-bindings: media: imx8q: add imx video codec bindings Ming Qian
  2021-05-31 14:43   ` Nicolas Dufresne
@ 2021-06-01 13:32   ` Rob Herring
  2021-06-02  8:09     ` [EXT] " Ming Qian
  1 sibling, 1 reply; 10+ messages in thread
From: Rob Herring @ 2021-06-01 13:32 UTC (permalink / raw)
  To: Ming Qian
  Cc: hverkuil-cisco, linux-media, festevam, robh+dt, s.hauer, kernel,
	devicetree, mchehab, linux-arm-kernel, linux-kernel, shawnguo,
	linux-imx, aisheng.dong

On Mon, 31 May 2021 10:51:09 +0800, Ming Qian wrote:
> Add devicetree binding documentation for IMX8Q Video Processing Unit IP
> 
> Signed-off-by: Ming Qian <ming.qian@nxp.com>
> Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
> Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
> ---
>  .../bindings/media/nxp,imx8q-vpu.yaml         | 201 ++++++++++++++++++
>  1 file changed, 201 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:
./Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml:24:9: [warning] wrong indentation: expected 10 but found 8 (indentation)
./Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml:67:13: [warning] wrong indentation: expected 10 but found 12 (indentation)
./Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml:94:7: [warning] wrong indentation: expected 8 but found 6 (indentation)

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml: properties:mu_m0: Additional properties are not allowed ('vpu_core' was unexpected)
	hint: Keywords must be a subset of known json-schema keywords
	from schema $id: http://devicetree.org/meta-schemas/keywords.yaml#
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml: properties:mu_m0: 'vpu_core' is not one of ['$ref', 'additionalItems', 'additionalProperties', 'allOf', 'anyOf', 'const', 'contains', 'default', 'dependencies', 'deprecated', 'description', 'else', 'enum', 'exclusiveMaximum', 'exclusiveMinimum', 'items', 'if', 'minItems', 'minimum', 'maxItems', 'maximum', 'multipleOf', 'not', 'oneOf', 'pattern', 'patternProperties', 'properties', 'required', 'then', 'type', 'typeSize', 'unevaluatedProperties', 'uniqueItems']
	from schema $id: http://devicetree.org/meta-schemas/keywords.yaml#
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml: 'oneOf' conditional failed, one must be fixed:
	'unevaluatedProperties' is a required property
	'additionalProperties' is a required property
	hint: A schema with a "$ref" to another schema either can define all properties used and use "additionalProperties" or can use "unevaluatedProperties"
	from schema $id: http://devicetree.org/meta-schemas/base.yaml#
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml: ignoring, error in schema: properties: mu_m0
warning: no schema found in file: ./Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
Documentation/devicetree/bindings/media/nxp,imx8q-vpu.example.dt.yaml:0:0: /example-0/vpu-bus@2c000000: failed to match any schema with compatible: ['nxp,imx8qm-vpu', 'simple-bus']
Documentation/devicetree/bindings/media/nxp,imx8q-vpu.example.dt.yaml:0:0: /example-0/vpu-bus@2c000000/vpu_decoder@2d080000: failed to match any schema with compatible: ['nxp,imx8q-vpu-decoder']
Documentation/devicetree/bindings/media/nxp,imx8q-vpu.example.dt.yaml:0:0: /example-0/vpu-bus@2c000000/vpu_encoder@2d090000: failed to match any schema with compatible: ['nxp,imx8q-vpu-encoder']
Documentation/devicetree/bindings/media/nxp,imx8q-vpu.example.dt.yaml:0:0: /example-0/vpu-bus@2c000000/vpu_encoder@2d0a0000: failed to match any schema with compatible: ['nxp,imx8q-vpu-encoder']

See https://patchwork.ozlabs.org/patch/1485530

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.


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^ permalink raw reply	[flat|nested] 10+ messages in thread

* RE: [EXT] Re: [PATCH 1/5] dt-bindings: media: imx8q: add imx video codec bindings
  2021-06-01 13:32   ` Rob Herring
@ 2021-06-02  8:09     ` Ming Qian
  0 siblings, 0 replies; 10+ messages in thread
From: Ming Qian @ 2021-06-02  8:09 UTC (permalink / raw)
  To: Rob Herring
  Cc: hverkuil-cisco, linux-media, festevam, robh+dt, s.hauer, kernel,
	devicetree, mchehab, linux-arm-kernel, linux-kernel, shawnguo,
	dl-linux-imx, Aisheng Dong

> On Mon, 31 May 2021 10:51:09 +0800, Ming Qian wrote:
> > Add devicetree binding documentation for IMX8Q Video Processing Unit
> > IP
> >
> > Signed-off-by: Ming Qian <ming.qian@nxp.com>
> > Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
> > Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
> > ---
> >  .../bindings/media/nxp,imx8q-vpu.yaml         | 201
> ++++++++++++++++++
> >  1 file changed, 201 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> >
> 
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
> 
> yamllint warnings/errors:
> ./Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml:24:9:
> [warning] wrong indentation: expected 10 but found 8 (indentation)
> ./Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml:67:13:
> [warning] wrong indentation: expected 10 but found 12 (indentation)
> ./Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml:94:7:
> [warning] wrong indentation: expected 8 but found 6 (indentation)
> 
> dtschema/dtc warnings/errors:
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media
> /nxp,imx8q-vpu.yaml: properties:mu_m0: Additional properties are not
> allowed ('vpu_core' was unexpected)
>         hint: Keywords must be a subset of known json-schema keywords
>         from schema $id:
> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetr
> ee.org%2Fmeta-schemas%2Fkeywords.yaml%23&amp;data=04%7C01%7Cmin
> g.qian%40nxp.com%7Ce1c1c81d4bf349f4551408d92501bba0%7C686ea1d3b
> c2b4c6fa92cd99c5c301635%7C0%7C0%7C637581511648466898%7CUnkno
> wn%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha
> WwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=z5K2eJR%2FKDI7GZbxzI733VSgAI
> R%2FI4sx9Visl21IJe8%3D&amp;reserved=0
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media
> /nxp,imx8q-vpu.yaml: properties:mu_m0: 'vpu_core' is not one of ['$ref',
> 'additionalItems', 'additionalProperties', 'allOf', 'anyOf', 'const', 'contains',
> 'default', 'dependencies', 'deprecated', 'description', 'else', 'enum',
> 'exclusiveMaximum', 'exclusiveMinimum', 'items', 'if', 'minItems', 'minimum',
> 'maxItems', 'maximum', 'multipleOf', 'not', 'oneOf', 'pattern',
> 'patternProperties', 'properties', 'required', 'then', 'type', 'typeSize',
> 'unevaluatedProperties', 'uniqueItems']
>         from schema $id:
> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetr
> ee.org%2Fmeta-schemas%2Fkeywords.yaml%23&amp;data=04%7C01%7Cmin
> g.qian%40nxp.com%7Ce1c1c81d4bf349f4551408d92501bba0%7C686ea1d3b
> c2b4c6fa92cd99c5c301635%7C0%7C0%7C637581511648466898%7CUnkno
> wn%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha
> WwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=z5K2eJR%2FKDI7GZbxzI733VSgAI
> R%2FI4sx9Visl21IJe8%3D&amp;reserved=0
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media
> /nxp,imx8q-vpu.yaml: 'oneOf' conditional failed, one must be fixed:
>         'unevaluatedProperties' is a required property
>         'additionalProperties' is a required property
>         hint: A schema with a "$ref" to another schema either can define all
> properties used and use "additionalProperties" or can use
> "unevaluatedProperties"
>         from schema $id:
> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetr
> ee.org%2Fmeta-schemas%2Fbase.yaml%23&amp;data=04%7C01%7Cming.qia
> n%40nxp.com%7Ce1c1c81d4bf349f4551408d92501bba0%7C686ea1d3bc2b4
> c6fa92cd99c5c301635%7C0%7C0%7C637581511648466898%7CUnknown%7
> CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiL
> CJXVCI6Mn0%3D%7C1000&amp;sdata=5XtViMjNpB5Xk6d82g%2FCb54xz2J2jK
> crmhXa5cusqNA%3D&amp;reserved=0
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media
> /nxp,imx8q-vpu.yaml: ignoring, error in schema: properties: mu_m0
> warning: no schema found in
> file: ./Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
> Documentation/devicetree/bindings/media/nxp,imx8q-vpu.example.dt.yaml:0:
> 0: /example-0/vpu-bus@2c000000: failed to match any schema with
> compatible: ['nxp,imx8qm-vpu', 'simple-bus']
> Documentation/devicetree/bindings/media/nxp,imx8q-vpu.example.dt.yaml:0:
> 0: /example-0/vpu-bus@2c000000/vpu_decoder@2d080000: failed to match
> any schema with compatible: ['nxp,imx8q-vpu-decoder']
> Documentation/devicetree/bindings/media/nxp,imx8q-vpu.example.dt.yaml:0:
> 0: /example-0/vpu-bus@2c000000/vpu_encoder@2d090000: failed to match
> any schema with compatible: ['nxp,imx8q-vpu-encoder']
> Documentation/devicetree/bindings/media/nxp,imx8q-vpu.example.dt.yaml:0:
> 0: /example-0/vpu-bus@2c000000/vpu_encoder@2d0a0000: failed to match
> any schema with compatible: ['nxp,imx8q-vpu-encoder']
> 
> See
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchw
> ork.ozlabs.org%2Fpatch%2F1485530&amp;data=04%7C01%7Cming.qian%40n
> xp.com%7Ce1c1c81d4bf349f4551408d92501bba0%7C686ea1d3bc2b4c6fa92
> cd99c5c301635%7C0%7C0%7C637581511648466898%7CUnknown%7CTWF
> pbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVC
> I6Mn0%3D%7C1000&amp;sdata=UuQ%2Fc7p6ybq5AQPNjxUHRqYCImyKvVeY
> 9UQCfeiE94g%3D&amp;reserved=0
> 
> This check can fail if there are any dependencies. The base for a patch series is
> generally the most recent rc1.
> 
> If you already ran 'make dt_binding_check' and didn't see the above error(s),
> then make sure 'yamllint' is installed and dt-schema is up to
> date:
> 
> pip3 install dtschema --upgrade
> 
> Please check and re-submit.

Hi Rob,
   I have found the problem, I 'll fix it and re-submit soon


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^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH 0/5] imx8q video decoder/encoder driver
  2021-05-31  2:51 [PATCH 0/5] imx8q video decoder/encoder driver Ming Qian
                   ` (3 preceding siblings ...)
  2021-05-31  2:51 ` [PATCH 5/5] firmware: imx: scu-pd: imx8q: add vpu mu resources Ming Qian
@ 2021-07-20 14:48 ` Nicolas Dufresne
  4 siblings, 0 replies; 10+ messages in thread
From: Nicolas Dufresne @ 2021-07-20 14:48 UTC (permalink / raw)
  To: Ming Qian, mchehab, shawnguo, robh+dt, s.hauer
  Cc: hverkuil-cisco, kernel, festevam, linux-imx, aisheng.dong,
	linux-media, linux-kernel, devicetree, linux-arm-kernel

Le lundi 31 mai 2021 à 10:51 +0800, Ming Qian a écrit :
> Hi all,
> 
> This patch series adds support for
> the imx8q video encoder and decoder
> via the VPU block present in imx8q platforms.
> Currently, support for IMX8QXP and IMX8QM is included.

Hi, 

might be repeating myself a little, but again, thanks for this hard work, this
is great. What I'd like to ask and raise is that this driver is mostly to
support Amphion CODEC (now owned by Allegro). The IMX/NXP specific is likely
larger then any other similar integration (like Hantro Codec or DesignWare HDMI
etc.). We likely don't want to reproduce error from the past. We should learn
from STM folks mistake. They created stmmac which we have to live with the name
now even though this endup being a DesignWare generic driver, used on a very
large amount of SoC today.

So perhaps this driver should be renamed and moved into media/platform/amphion.
If NXP remains the only SoC using it, it should have no side effect, you will
keep maintaining / owning this driver, otherwise it other integration will just
have to introduce a bit of infrastructure to abstract the SoC specific code
(like was done in Hantro to support IMX8M).

regards,
Nicolas

> 
> It features decoding for the following formats:
> - H.264
> - HEVC
> - MPEG4
> - MPEG2
> - MJPEG
> - VC1
> - VP8
> - AVS
> 
> It features encoding for the following formats:
> - H.264
> 
> The driver creates a separate device node for
> the encoder and decoder.
> 
> Compliance
> ==========
> # v4l2-compliance -d /dev/video0
> v4l2-compliance SHA: not available
> , 64 bits, 64-bit time_t
> 
> Compliance test for vpu B0 device /dev/video0:
> 
> Driver Info:
> 	Driver name      : vpu B0
> 	Card type        : imx vpu decoder
> 	Bus info         : platform: imx8q-vpu
> 	Driver version   : 5.10.35
> 	Capabilities     : 0x84204000
> 		Video Memory-to-Memory Multiplanar
> 		Streaming
> 		Extended Pix Format
> 		Device Capabilities
> 	Device Caps      : 0x04204000
> 		Video Memory-to-Memory Multiplanar
> 		Streaming
> 		Extended Pix Format
> 
> Required ioctls:
> 	test VIDIOC_QUERYCAP: OK
> 
> Allow for multiple opens:
> 	test second /dev/video0 open: OK
> 	test VIDIOC_QUERYCAP: OK
> 	test VIDIOC_G/S_PRIORITY: OK
> 	test for unlimited opens: OK
> 
> 	test invalid ioctls: OK
> Debug ioctls:
> 	test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)
> 	test VIDIOC_LOG_STATUS: OK (Not Supported)
> 
> Input ioctls:
> 	test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
> 	test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
> 	test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
> 	test VIDIOC_ENUMAUDIO: OK (Not Supported)
> 	test VIDIOC_G/S/ENUMINPUT: OK (Not Supported)
> 	test VIDIOC_G/S_AUDIO: OK (Not Supported)
> 	Inputs: 0 Audio Inputs: 0 Tuners: 0
> 
> Output ioctls:
> 	test VIDIOC_G/S_MODULATOR: OK (Not Supported)
> 	test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
> 	test VIDIOC_ENUMAUDOUT: OK (Not Supported)
> 	test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
> 	test VIDIOC_G/S_AUDOUT: OK (Not Supported)
> 	Outputs: 0 Audio Outputs: 0 Modulators: 0
> 
> Input/Output configuration ioctls:
> 	test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
> 	test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported)
> 	test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported)
> 	test VIDIOC_G/S_EDID: OK (Not Supported)
> 
> Control ioctls:
> 	test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK
> 	test VIDIOC_QUERYCTRL: OK
> 	test VIDIOC_G/S_CTRL: OK
> 	test VIDIOC_G/S/TRY_EXT_CTRLS: OK
> 	test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK
> 	test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)
> 	Standard Controls: 3 Private Controls: 2
> 
> Format ioctls:
> 	test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK
> 	test VIDIOC_G/S_PARM: OK (Not Supported)
> 	test VIDIOC_G_FBUF: OK (Not Supported)
> 	test VIDIOC_G_FMT: OK
> 	test VIDIOC_TRY_FMT: OK
> 	test VIDIOC_S_FMT: OK
> 	test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
> 	test Cropping: OK
> 	test Composing: OK
> 	test Scaling: OK
> 
> Codec ioctls:
> 	test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported)
> 	test VIDIOC_G_ENC_INDEX: OK (Not Supported)
> 	test VIDIOC_(TRY_)DECODER_CMD: OK
> 
> Buffer ioctls:
> 	test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK
> 	test VIDIOC_EXPBUF: OK
> 	test Requests: OK (Not Supported)
> 
> Total for vpu b0 device /dev/video0: 45, Succeeded: 45, Failed: 0, Warnings: 0
> 
> # v4l2-compliance -d /dev/video1
> v4l2-compliance SHA: not available
> , 64 bits, 64-bit time_t
> 
> Compliance test for imx vpu encoder device /dev/video1:
> 
> Driver Info:
> 	Driver name      : imx vpu encoder
> 	Card type        : imx vpu encoder
> 	Bus info         : platform: imx8q-vpu
> 	Driver version   : 5.10.35
> 	Capabilities     : 0x84204000
> 		Video Memory-to-Memory Multiplanar
> 		Streaming
> 		Extended Pix Format
> 		Device Capabilities
> 	Device Caps      : 0x04204000
> 		Video Memory-to-Memory Multiplanar
> 		Streaming
> 		Extended Pix Format
> 	Detected Stateful Encoder
> 
> Required ioctls:
> 	test VIDIOC_QUERYCAP: OK
> 
> Allow for multiple opens:
> 	test second /dev/video1 open: OK
> 	test VIDIOC_QUERYCAP: OK
> 	test VIDIOC_G/S_PRIORITY: OK
> 	test for unlimited opens: OK
> 
> 	test invalid ioctls: OK
> Debug ioctls:
> 	test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)
> 	test VIDIOC_LOG_STATUS: OK (Not Supported)
> 
> Input ioctls:
> 	test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
> 	test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
> 	test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
> 	test VIDIOC_ENUMAUDIO: OK (Not Supported)
> 	test VIDIOC_G/S/ENUMINPUT: OK (Not Supported)
> 	test VIDIOC_G/S_AUDIO: OK (Not Supported)
> 	Inputs: 0 Audio Inputs: 0 Tuners: 0
> 
> Output ioctls:
> 	test VIDIOC_G/S_MODULATOR: OK (Not Supported)
> 	test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
> 	test VIDIOC_ENUMAUDOUT: OK (Not Supported)
> 	test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
> 	test VIDIOC_G/S_AUDOUT: OK (Not Supported)
> 	Outputs: 0 Audio Outputs: 0 Modulators: 0
> 
> Input/Output configuration ioctls:
> 	test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
> 	test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported)
> 	test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported)
> 	test VIDIOC_G/S_EDID: OK (Not Supported)
> 
> Control ioctls:
> 	test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK
> 	test VIDIOC_QUERYCTRL: OK
> 	test VIDIOC_G/S_CTRL: OK
> 	test VIDIOC_G/S/TRY_EXT_CTRLS: OK
> 	test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK
> 	test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)
> 	Standard Controls: 20 Private Controls: 0
> 
> Format ioctls:
> 	test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK
> 	test VIDIOC_G/S_PARM: OK
> 	test VIDIOC_G_FBUF: OK (Not Supported)
> 	test VIDIOC_G_FMT: OK
> 	test VIDIOC_TRY_FMT: OK
> 	test VIDIOC_S_FMT: OK
> 	test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
> 	test Cropping: OK
> 	test Composing: OK (Not Supported)
> 	test Scaling: OK (Not Supported)
> 
> Codec ioctls:
> 	test VIDIOC_(TRY_)ENCODER_CMD: OK
> 	test VIDIOC_G_ENC_INDEX: OK (Not Supported)
> 	test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported)
> 
> Buffer ioctls:
> 	test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK
> 	test VIDIOC_EXPBUF: OK
> 	test Requests: OK (Not Supported)
> 
> Total for imx vpu encoder device /dev/video1: 45, Succeeded: 45, Failed: 0, Warnings: 0
> 
> Ming Qian (5):
>   dt-bindings: media: imx8q: add imx video codec bindings
>   media: v4l: add some definition of v4l2
>     colorspace/xfer_func/ycbcr_encoding
>   media: imx: imx8q: add v4l2 m2m video codec driver
>   ARM64: dts: freescale: imx8q: add imx vpu codec entries
>   firmware: imx: scu-pd: imx8q: add vpu mu resources
> 
>  .../bindings/media/nxp,imx8q-vpu.yaml         |  201 ++
>  .../arm64/boot/dts/freescale/imx8-ss-vpu.dtsi |   76 +
>  arch/arm64/boot/dts/freescale/imx8qxp-mek.dts |   22 +
>  arch/arm64/boot/dts/freescale/imx8qxp.dtsi    |   27 +
>  drivers/firmware/imx/scu-pd.c                 |    4 +
>  drivers/media/platform/Kconfig                |    2 +
>  drivers/media/platform/Makefile               |    2 +
>  drivers/media/platform/imx/Kconfig            |   19 +
>  drivers/media/platform/imx/Makefile           |    1 +
>  drivers/media/platform/imx/vpu-8q/Makefile    |   23 +
>  drivers/media/platform/imx/vpu-8q/vdec.c      | 1783 +++++++++++++++++
>  drivers/media/platform/imx/vpu-8q/venc.c      | 1411 +++++++++++++
>  drivers/media/platform/imx/vpu-8q/vpu.h       |  339 ++++
>  drivers/media/platform/imx/vpu-8q/vpu_cmds.c  |  443 ++++
>  drivers/media/platform/imx/vpu-8q/vpu_cmds.h  |   34 +
>  drivers/media/platform/imx/vpu-8q/vpu_codec.h |   77 +
>  drivers/media/platform/imx/vpu-8q/vpu_color.c |  201 ++
>  drivers/media/platform/imx/vpu-8q/vpu_core.c  |  923 +++++++++
>  drivers/media/platform/imx/vpu-8q/vpu_core.h  |   26 +
>  drivers/media/platform/imx/vpu-8q/vpu_dbg.c   |  505 +++++
>  drivers/media/platform/imx/vpu-8q/vpu_defs.h  |  194 ++
>  .../media/platform/imx/vpu-8q/vpu_dev_imx8q.c |   82 +
>  drivers/media/platform/imx/vpu-8q/vpu_drv.c   |  248 +++
>  .../media/platform/imx/vpu-8q/vpu_helpers.c   |  405 ++++
>  .../media/platform/imx/vpu-8q/vpu_helpers.h   |   80 +
>  drivers/media/platform/imx/vpu-8q/vpu_imx8q.c |  227 +++
>  drivers/media/platform/imx/vpu-8q/vpu_imx8q.h |  125 ++
>  drivers/media/platform/imx/vpu-8q/vpu_log.h   |   53 +
>  .../media/platform/imx/vpu-8q/vpu_malone.c    | 1744 ++++++++++++++++
>  .../media/platform/imx/vpu-8q/vpu_malone.h    |   51 +
>  drivers/media/platform/imx/vpu-8q/vpu_mbox.c  |  135 ++
>  drivers/media/platform/imx/vpu-8q/vpu_mbox.h  |   25 +
>  drivers/media/platform/imx/vpu-8q/vpu_msgs.c  |  420 ++++
>  drivers/media/platform/imx/vpu-8q/vpu_msgs.h  |   23 +
>  drivers/media/platform/imx/vpu-8q/vpu_rpc.c   |  266 +++
>  drivers/media/platform/imx/vpu-8q/vpu_rpc.h   |  472 +++++
>  drivers/media/platform/imx/vpu-8q/vpu_v4l2.c  |  730 +++++++
>  drivers/media/platform/imx/vpu-8q/vpu_v4l2.h  |   56 +
>  .../media/platform/imx/vpu-8q/vpu_windsor.c   | 1253 ++++++++++++
>  .../media/platform/imx/vpu-8q/vpu_windsor.h   |   48 +
>  include/linux/imx_vpu.h                       |   19 +
>  include/uapi/linux/imx_vpu.h                  |  120 ++
>  include/uapi/linux/videodev2.h                |   30 +
>  43 files changed, 12925 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/media/nxp,imx8q-vpu.yaml
>  create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi
>  create mode 100644 drivers/media/platform/imx/Kconfig
>  create mode 100644 drivers/media/platform/imx/Makefile
>  create mode 100644 drivers/media/platform/imx/vpu-8q/Makefile
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vdec.c
>  create mode 100644 drivers/media/platform/imx/vpu-8q/venc.c
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu.h
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_cmds.c
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_cmds.h
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_codec.h
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_color.c
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_core.c
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_core.h
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_dbg.c
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_defs.h
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_dev_imx8q.c
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_drv.c
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_helpers.c
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_helpers.h
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_imx8q.c
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_imx8q.h
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_log.h
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_malone.c
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_malone.h
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_mbox.c
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_mbox.h
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_msgs.c
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_msgs.h
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_rpc.c
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_rpc.h
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_v4l2.c
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_v4l2.h
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_windsor.c
>  create mode 100644 drivers/media/platform/imx/vpu-8q/vpu_windsor.h
>  create mode 100644 include/linux/imx_vpu.h
>  create mode 100644 include/uapi/linux/imx_vpu.h
> 



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^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2021-07-20 14:50 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-05-31  2:51 [PATCH 0/5] imx8q video decoder/encoder driver Ming Qian
2021-05-31  2:51 ` [PATCH 1/5] dt-bindings: media: imx8q: add imx video codec bindings Ming Qian
2021-05-31 14:43   ` Nicolas Dufresne
2021-06-01  1:48     ` [EXT] " Ming Qian
2021-06-01 13:32   ` Rob Herring
2021-06-02  8:09     ` [EXT] " Ming Qian
2021-05-31  2:51 ` [PATCH 2/5] media: v4l: add some definition of v4l2 colorspace/xfer_func/ycbcr_encoding Ming Qian
2021-05-31  2:51 ` [PATCH 4/5] ARM64: dts: freescale: imx8q: add imx vpu codec entries Ming Qian
2021-05-31  2:51 ` [PATCH 5/5] firmware: imx: scu-pd: imx8q: add vpu mu resources Ming Qian
2021-07-20 14:48 ` [PATCH 0/5] imx8q video decoder/encoder driver Nicolas Dufresne

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