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From: "gabriel.fernandez@foss.st.com" <gabriel.fernandez@foss.st.com>
To: Stephen Boyd <sboyd@kernel.org>,
	Alexandre Torgue <alexandre.torgue@st.com>,
	Etienne Carriere <etienne.carriere@st.com>,
	"Maxime Coquelin" <mcoquelin.stm32@gmail.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	"Rob Herring" <robh+dt@kernel.org>, <marex@denx.de>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-stm32@st-md-mailman.stormreply.com
Subject: Re: [PATCH v2 02/14] clk: stm32mp1: merge 'ck_hse_rtc' and 'ck_rtc' into one clock
Date: Tue, 23 Feb 2021 17:34:11 +0100	[thread overview]
Message-ID: <b66530be-2b01-0306-ad56-af00e8e1d0a5@foss.st.com> (raw)
In-Reply-To: <161369805767.1254594.5233096495913117772@swboyd.mtv.corp.google.com>


On 2/19/21 2:27 AM, Stephen Boyd wrote:
> Quoting gabriel.fernandez@foss.st.com (2021-02-12 00:08:40)
>> On 2/9/21 9:00 AM, Stephen Boyd wrote:
>>> Quoting gabriel.fernandez@foss.st.com (2021-01-26 01:01:08)
>>>> From: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
>>>>
>>>> 'ck_rtc' has multiple clocks as input (ck_hsi, ck_lsi, and ck_hse).
>>>> A divider is available only on the specific rtc input for ck_hse.
>>>> This Merge will facilitate to have a more coherent clock tree
>>>> in no trusted / trusted world.
>>>>
>>>> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
>>>> ---
>>>>    drivers/clk/clk-stm32mp1.c | 49 +++++++++++++++++++++++++++++++++-----
>>>>    1 file changed, 43 insertions(+), 6 deletions(-)
>>>>
>>>> diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c
>>>> index 35d5aee8f9b0..0e1d4427a8df 100644
>>>> --- a/drivers/clk/clk-stm32mp1.c
>>>> +++ b/drivers/clk/clk-stm32mp1.c
>>>> @@ -245,7 +245,7 @@ static const char * const dsi_src[] = {
>>>>    };
>>>>    
>>>>    static const char * const rtc_src[] = {
>>>> -       "off", "ck_lse", "ck_lsi", "ck_hse_rtc"
>>>> +       "off", "ck_lse", "ck_lsi", "ck_hse"
>>>>    };
>>>>    
>>>>    static const char * const mco1_src[] = {
>>>> @@ -1031,6 +1031,42 @@ static struct clk_hw *clk_register_cktim(struct device *dev, const char *name,
>>>>           return hw;
>>>>    }
>>>>    
>>>> +/* The divider of RTC clock concerns only ck_hse clock */
>>>> +#define HSE_RTC 3
>>>> +
>>>> +static unsigned long clk_divider_rtc_recalc_rate(struct clk_hw *hw,
>>>> +                                                unsigned long parent_rate)
>>>> +{
>>>> +       if (clk_hw_get_parent(hw) == clk_hw_get_parent_by_index(hw, HSE_RTC))
>>>> +               return clk_divider_ops.recalc_rate(hw, parent_rate);
>>>> +
>>>> +       return parent_rate;
>>>> +}
>>>> +
>>>> +static long clk_divider_rtc_round_rate(struct clk_hw *hw, unsigned long rate,
>>>> +                                      unsigned long *prate)
>>>> +{
>>>> +       if (clk_hw_get_parent(hw) == clk_hw_get_parent_by_index(hw, HSE_RTC))
>>> This clk op can be called at basically any time. Maybe this should use
>>> the determine rate op and then look to see what the parent is that comes
>>> in via the rate request structure? Or is the intention to keep this
>>> pinned to one particular parent? Looking at this right now it doesn't
>>> really make much sense why the current parent state should play into
>>> what rate the clk can round to, unless there is some more clk flags
>>> going on that constrain the ability to change this clk's parent.
>> Yes the intention is to keep this pinned for one particular parent.
>>
>> This divider is only applied on the 4th input of the MUX of the RTC and
>>
>> doesn't affect the HSE frequency for all the system.
>>
>>
>> Oscillators
>>    -----
>> | lse |----------------+----------------> ck_lse
>>    -----                 |
>>    -----                 |
>> | lsi |------------+--------------------> ck_lsi
>>    -----             |   |
>>                      |   |
>>    -----             |   |
>> | hse |----+-------|---|----------------> ck_hse
>>    -----     |       |   |
>>              |       |   |         |\ mux
>>              |       |   |  OFF -->| \
>>              |       |   |         |  \     gate
>>              |       |   --------->|  |     ---
>>              |       |             |  |--->|   |--> ck_rtc
>>              |       ------------->|  |     ---
>>              |    -----------      |  |
>>               ----| % 1 to 64 |--->| /
>>                    -----------     |/
>>                      divider
>>
>> I manage the RTC with a clock composite with a gate a mux and a specific
>> rate ops for hse input.
>>
>> That why i need to the parent state.
>>
> So would using determine_rate op instead of round_rate op help here? That
> will provide the current parent rate and hw pointer in the rate request
> structure.

yes u understand what you mean, i will send you a v3.

Many Thanks.


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  parent reply	other threads:[~2021-02-23 16:35 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-26  9:01 [PATCH v2 00/14] Introduce STM32MP1 RCC in secured mode gabriel.fernandez
2021-01-26  9:01 ` [PATCH v2 01/14] clk: stm32mp1: merge 'clk-hsi-div' and 'ck_hsi' into one clock gabriel.fernandez
2021-01-26  9:01 ` [PATCH v2 02/14] clk: stm32mp1: merge 'ck_hse_rtc' and 'ck_rtc' " gabriel.fernandez
2021-02-09  8:00   ` Stephen Boyd
2021-02-12  8:08     ` gabriel.fernandez
     [not found]       ` <161369805767.1254594.5233096495913117772@swboyd.mtv.corp.google.com>
2021-02-23 16:34         ` gabriel.fernandez [this message]
2021-01-26  9:01 ` [PATCH v2 03/14] clk: stm32mp1: remove intermediate pll clocks gabriel.fernandez
2021-01-26  9:01 ` [PATCH v2 04/14] clk: stm32mp1: convert to module driver gabriel.fernandez
2021-01-26  9:01 ` [PATCH v2 05/14] clk: stm32mp1: move RCC reset controller into RCC clock driver gabriel.fernandez
2021-01-26  9:01 ` [PATCH v2 06/14] reset: stm32mp1: remove stm32mp1 reset gabriel.fernandez
2021-01-26  9:01 ` [PATCH v2 07/14] dt-bindings: clock: add IDs for SCMI clocks on stm32mp15 gabriel.fernandez
2021-02-09 17:52   ` Rob Herring
2021-01-26  9:01 ` [PATCH v2 08/14] dt-bindings: reset: add IDs for SCMI reset domains " gabriel.fernandez
2021-02-09 17:53   ` Rob Herring
2021-01-26  9:01 ` [PATCH v2 09/14] dt-bindings: reset: add MCU HOLD BOOT ID " gabriel.fernandez
2021-02-09 17:54   ` Rob Herring
2021-01-26  9:01 ` [PATCH v2 10/14] clk: stm32mp1: new compatible for secure RCC support gabriel.fernandez
2021-01-26  9:01 ` [PATCH v2 11/14] ARM: dts: stm32: define SCMI resources on stm32mp15 gabriel.fernandez
2021-01-26  9:01 ` [PATCH v2 12/14] ARM: dts: stm32: move clocks/resets to SCMI resources for stm32mp15 gabriel.fernandez
2021-02-18  9:45   ` [Linux-stm32] " Ahmad Fatoum
2021-01-26  9:01 ` [PATCH v2 13/14] dt-bindings: clock: stm32mp1 new compatible for secure rcc gabriel.fernandez
2021-02-09 17:56   ` Rob Herring
2021-01-26  9:01 ` [PATCH v2 14/14] ARM: dts: stm32: introduce basic boot include on stm32mp15x board gabriel.fernandez
2021-03-09 21:50 ` [PATCH v2 00/14] Introduce STM32MP1 RCC in secured mode Alex G.
2021-03-11  8:08   ` Alexandre TORGUE
2021-03-11 11:43     ` Marek Vasut
2021-03-11 13:15       ` Alexandre TORGUE
2021-03-11 13:23         ` Marek Vasut
2021-03-11 14:02       ` Alexandre TORGUE
2021-03-11 14:41         ` [Linux-stm32] " Ahmad Fatoum
2021-03-11 15:18           ` Alexandre TORGUE
2021-03-11 15:49             ` Ahmad Fatoum
2021-03-11 16:11           ` Marek Vasut
2021-03-11 18:10             ` Alexandre TORGUE
2021-03-11 18:23               ` Alex G.
2021-03-11 20:09               ` Marek Vasut
2021-03-12  8:22                 ` Alexandre TORGUE

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