From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D459CC74A35 for ; Thu, 11 Jul 2019 13:17:16 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A71B52166E for ; Thu, 11 Jul 2019 13:17:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="h4gw4LHQ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A71B52166E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:To:Subject:Reply-To:Content-ID:Content-Description :Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=+0jmtvo3X0GPw4Uy1SUvL1+KHoGC4EzK3aL8CeJMEOs=; b=h4gw4LHQogbbOu jFREjhT8tuYHXdVIkqXri6dJs7srI7unOWBU8O8EZFqKb/tllNMCaY3CcJKhV0jD/vHht8kXivuLM PvHwMojC2WX1abidLlCA9WkYK94rqyvT4PzGhPY+HuCGM8AeHrhCmclPXCJdZPrsB05F38oth5imI q0Dic8IiC/mCSicIP/nkdPe286Xq4swM6pSFtGOTV6sgQsXXlxT7Nx74xdwpaA6UqNdT+MJayDwXB fgbH1L+xZMeYJxmNI3uy/1WRmvABgL6uiw/Ja/unQBezYQZrmGdGmWKcHFS+PF0mvdwSrr/i/8qpZ pTxKyQ5PxybSvHk/WUGQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hlYwf-00085m-F8; Thu, 11 Jul 2019 13:17:09 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hlYwc-000854-Cn for linux-arm-kernel@lists.infradead.org; Thu, 11 Jul 2019 13:17:07 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 279D52B; Thu, 11 Jul 2019 06:17:05 -0700 (PDT) Received: from [10.1.196.217] (e121566-lin.cambridge.arm.com [10.1.196.217]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4D6103F59C; Thu, 11 Jul 2019 06:17:04 -0700 (PDT) Subject: Re: [PATCH 48/59] KVM: arm64: nv: Load timer before the GIC To: Marc Zyngier , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org References: <20190621093843.220980-1-marc.zyngier@arm.com> <20190621093843.220980-49-marc.zyngier@arm.com> From: Alexandru Elisei Message-ID: Date: Thu, 11 Jul 2019 14:17:03 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.2 MIME-Version: 1.0 In-Reply-To: <20190621093843.220980-49-marc.zyngier@arm.com> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190711_061706_476891_5D623818 X-CRM114-Status: GOOD ( 15.66 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andre Przywara , Dave Martin Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 6/21/19 10:38 AM, Marc Zyngier wrote: > In order for vgic_v3_load_nested to be able to observe which > which timer interrupts have the HW bit set for the current s/which which/which > context, the timers must have been loaded in the new mode > and the right timer mapped to their corresponding HW IRQs. > > At the moment, we load the GIC first, meaning that timer > interrupts injected to an L2 guest will never have the HW > HW bit set (we see the old configuration). s/HW HW/HW > Swapping the two loads solves this particular problem. > > Signed-off-by: Marc Zyngier > --- > virt/kvm/arm/arm.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/virt/kvm/arm/arm.c b/virt/kvm/arm/arm.c > index e8b584b79847..ca10a11e044e 100644 > --- a/virt/kvm/arm/arm.c > +++ b/virt/kvm/arm/arm.c > @@ -361,8 +361,8 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) > vcpu->arch.host_cpu_context = &cpu_data->host_ctxt; > > kvm_arm_set_running_vcpu(vcpu); > - kvm_vgic_load(vcpu); > kvm_timer_vcpu_load(vcpu); > + kvm_vgic_load(vcpu); > kvm_vcpu_load_sysregs(vcpu); > kvm_arch_vcpu_load_fp(vcpu); > kvm_vcpu_pmu_restore_guest(vcpu); _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel