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([2001:b07:6468:f312:b096:1b7:7695:e4f7]) by smtp.gmail.com with ESMTPSA id t8sm9309944wro.56.2020.05.29.04.11.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 29 May 2020 04:11:59 -0700 (PDT) Subject: Re: [PATCH RFCv2 9/9] arm64: Support async page fault To: Marc Zyngier , Gavin Shan References: <20200508032919.52147-1-gshan@redhat.com> <20200508032919.52147-10-gshan@redhat.com> <81adf013-3de7-23e6-7648-8aec821b033c@redhat.com> <8ab64c6a-582b-691d-79ab-21cdc0455cd3@redhat.com> <6a4a82a4-af01-98c2-c854-9199f55f7bd3@redhat.com> <6965aaf641a23fab64fbe2ceeb790272@kernel.org> From: Paolo Bonzini Message-ID: Date: Fri, 29 May 2020 13:11:57 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.6.0 MIME-Version: 1.0 In-Reply-To: <6965aaf641a23fab64fbe2ceeb790272@kernel.org> Content-Language: en-US X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200529_041208_695480_1BBB70EC X-CRM114-Status: GOOD ( 13.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: catalin.marinas@arm.com, linux-kernel@vger.kernel.org, shan.gavin@gmail.com, will@kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 29/05/20 11:41, Marc Zyngier wrote: >>> >>> >>> For x86 the advantage is that the processor can take care of raising the >>> stage2 page fault in the guest, so it's faster. >>> >> I think there might be too much overhead if the page can be populated >> quickly by host. For example, it's fast to populate the pages if swapin >> isn't involved. Those would still be handled by the host. Only those that are not present in the host (which you can see through the MMU notifier) would be routed to the guest. You can do things differently between "not present fault because the page table does not exist" and "not present fault because the page is missing in the host". >> If I'm correct enough, it seems arm64 doesn't have similar mechanism, >> routing stage2 page fault to guest. > > Indeed, this isn't a thing on arm64. Exception caused by a S2 fault are > always routed to EL2. Is there an ARM-approved way to reuse the S2 fault syndromes to detect async page faults? (By the way, another "modern" use for async page faults is for postcopy live migration). Thanks, Paolo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel