From: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
To: Jon Nettleton <jon@solid-run.com>, Robin Murphy <robin.murphy@arm.com>
Cc: linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
"ACPI Devel Maling List" <linux-acpi@vger.kernel.org>,
"iommu@lists.linux-foundation.org"
<iommu@lists.linux-foundation.org>,
Linuxarm <linuxarm@huawei.com>,
"Steven Price" <steven.price@arm.com>,
"Guohanjun (Hanjun Guo)" <guohanjun@huawei.com>,
yangyicong <yangyicong@huawei.com>,
"Sami.Mujawar@arm.com" <Sami.Mujawar@arm.com>,
wanghuiqiang <wanghuiqiang@huawei.com>
Subject: RE: [PATCH v5 7/8] iommu/arm-smmu: Get associated RMR info and install bypass SMR
Date: Wed, 30 Jun 2021 08:50:26 +0000 [thread overview]
Message-ID: <d2223be42ce9497da8c02a87558beab6@huawei.com> (raw)
In-Reply-To: <CABdtJHsz+ycVffJTyekau_OY6ROmoTBWAGd_guikxauT=nnuJQ@mail.gmail.com>
> -----Original Message-----
> From: Jon Nettleton [mailto:jon@solid-run.com]
> Sent: 29 June 2021 17:26
> To: Robin Murphy <robin.murphy@arm.com>
> Cc: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>;
> linux-arm-kernel <linux-arm-kernel@lists.infradead.org>; ACPI Devel Maling
> List <linux-acpi@vger.kernel.org>; iommu@lists.linux-foundation.org; Linuxarm
> <linuxarm@huawei.com>; Steven Price <steven.price@arm.com>; Guohanjun
> (Hanjun Guo) <guohanjun@huawei.com>; yangyicong
> <yangyicong@huawei.com>; Sami.Mujawar@arm.com; wanghuiqiang
> <wanghuiqiang@huawei.com>
> Subject: Re: [PATCH v5 7/8] iommu/arm-smmu: Get associated RMR info and
> install bypass SMR
>
[...]
> Shameer,
>
> Sorry for the delays. Here is a diff of the changes that should
> address the issues pointed out by Robin,
> I have tested that this works as expected on my HoneyComb LX2160A.
Ok. Thanks for that.
> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c
> b/drivers/iommu/arm/arm-smmu/arm-smmu.c
> index ab7b9db77625..a358bd326d0b 100644
> --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c
> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c
> @@ -2068,29 +2068,21 @@ static void
> arm_smmu_rmr_install_bypass_smr(struct arm_smmu_device *smmu)
> struct list_head rmr_list;
> struct iommu_resv_region *e;
> int i, cnt = 0;
> - u32 smr;
> u32 reg;
>
> INIT_LIST_HEAD(&rmr_list);
> if (iommu_dma_get_rmrs(dev_fwnode(smmu->dev), &rmr_list))
> return;
>
> - reg = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sCR0);
> + /* Rather than trying to look at existing mappings that
> + * are setup by the firmware and then invalidate the ones
> + * that do no have matching RMR entries, just disable the
> + * SMMU until it gets enabled again in the reset routine.
> + */
>
> - if ((reg & ARM_SMMU_sCR0_USFCFG) && !(reg &
> ARM_SMMU_sCR0_CLIENTPD)) {
> - /*
> - * SMMU is already enabled and disallowing bypass, so
> preserve
> - * the existing SMRs
> - */
> - for (i = 0; i < smmu->num_mapping_groups; i++) {
> - smr = arm_smmu_gr0_read(smmu,
> ARM_SMMU_GR0_SMR(i));
> - if (!FIELD_GET(ARM_SMMU_SMR_VALID, smr))
> - continue;
> - smmu->smrs[i].id =
> FIELD_GET(ARM_SMMU_SMR_ID, smr);
> - smmu->smrs[i].mask =
> FIELD_GET(ARM_SMMU_SMR_MASK, smr);
> - smmu->smrs[i].valid = true;
> - }
> - }
> + reg = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sCR0);
> + reg &= ~ARM_SMMU_sCR0_CLIENTPD;
> + arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sCR0, reg);
>
> list_for_each_entry(e, &rmr_list, list) {
> u32 sid = e->fw_data.rmr.sid;
> @@ -2100,25 +2092,16 @@ static void
> arm_smmu_rmr_install_bypass_smr(struct arm_smmu_device *smmu)
> continue;
> if (smmu->s2crs[i].count == 0) {
> smmu->smrs[i].id = sid;
> - smmu->smrs[i].mask = ~0;
> + smmu->smrs[i].mask = 0;
> smmu->smrs[i].valid = true;
> }
> smmu->s2crs[i].count++;
> smmu->s2crs[i].type = S2CR_TYPE_BYPASS;
> smmu->s2crs[i].privcfg = S2CR_PRIVCFG_DEFAULT;
> - smmu->s2crs[i].cbndx = 0xff;
>
> cnt++;
> }
>
> - if ((reg & ARM_SMMU_sCR0_USFCFG) && !(reg &
> ARM_SMMU_sCR0_CLIENTPD)) {
> - /* Remove the valid bit for unused SMRs */
> - for (i = 0; i < smmu->num_mapping_groups; i++) {
> - if (smmu->s2crs[i].count == 0)
> - smmu->smrs[i].valid = false;
> - }
> - }
> -
> dev_notice(smmu->dev, "\tpreserved %d boot mapping%s\n", cnt,
> cnt == 1 ? "" : "s");
> iommu_dma_put_rmrs(dev_fwnode(smmu->dev), &rmr_list);
>
> Please include that in your next patch series. Let me know if you
> want me to send you the patch direct
> off the list.
No problem, I will take this in next.
Thanks,
Shameer
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-06-30 8:53 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-24 11:02 [PATCH v5 0/8] ACPI/IORT: Support for IORT RMR node Shameer Kolothum
2021-05-24 11:02 ` [PATCH v5 1/8] ACPI/IORT: Add support for RMR node parsing Shameer Kolothum
2021-06-14 11:14 ` Robin Murphy
2021-06-14 12:37 ` Shameerali Kolothum Thodi
2021-05-24 11:02 ` [PATCH v5 2/8] iommu/dma: Introduce generic helper to retrieve RMR info Shameer Kolothum
2021-05-24 15:35 ` kernel test robot
2021-05-24 11:02 ` [PATCH v5 3/8] ACPI/IORT: Add a helper to retrieve RMR memory regions Shameer Kolothum
2021-05-26 7:53 ` Laurentiu Tudor
2021-05-26 16:36 ` Shameerali Kolothum Thodi
2021-05-26 17:11 ` Laurentiu Tudor
2021-06-03 12:27 ` Jon Nettleton
2021-06-03 12:32 ` Laurentiu Tudor
2021-05-27 4:25 ` Jon Nettleton
2021-06-14 10:35 ` Robin Murphy
2021-06-14 11:23 ` Robin Murphy
2021-06-14 12:49 ` Shameerali Kolothum Thodi
2021-06-29 17:34 ` Jon Nettleton
2021-07-04 7:38 ` Jon Nettleton
2021-07-05 9:10 ` Shameerali Kolothum Thodi
2021-05-24 11:02 ` [PATCH v5 4/8] iommu/arm-smmu-v3: Introduce strtab init helper Shameer Kolothum
2021-05-24 11:02 ` [PATCH v5 5/8] iommu/arm-smmu-v3: Add bypass flag to arm_smmu_write_strtab_ent() Shameer Kolothum
2021-06-14 10:23 ` Robin Murphy
2021-06-14 12:51 ` Shameerali Kolothum Thodi
2021-05-24 11:02 ` [PATCH v5 6/8] iommu/arm-smmu-v3: Get associated RMR info and install Shameer Kolothum
2021-06-14 10:15 ` Robin Murphy
2021-05-24 11:02 ` [PATCH v5 7/8] iommu/arm-smmu: Get associated RMR info and install bypass SMR Shameer Kolothum
2021-06-03 8:52 ` Jon Nettleton
2021-06-03 11:27 ` Steven Price
2021-06-03 11:51 ` Jon Nettleton
2021-06-13 7:40 ` Jon Nettleton
2021-06-14 9:23 ` Robin Murphy
2021-06-14 10:06 ` Robin Murphy
2021-06-14 16:51 ` Shameerali Kolothum Thodi
2021-06-15 8:02 ` Jon Nettleton
2021-06-29 7:03 ` Jon Nettleton
2021-06-29 13:22 ` Robin Murphy
2021-06-29 16:25 ` Jon Nettleton
2021-06-30 8:50 ` Shameerali Kolothum Thodi [this message]
2021-05-24 11:02 ` [PATCH v5 8/8] iommu/dma: Reserve any RMR regions associated with a dev Shameer Kolothum
2021-05-24 15:18 ` [PATCH v5 0/8] ACPI/IORT: Support for IORT RMR node Steven Price
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=d2223be42ce9497da8c02a87558beab6@huawei.com \
--to=shameerali.kolothum.thodi@huawei.com \
--cc=Sami.Mujawar@arm.com \
--cc=guohanjun@huawei.com \
--cc=iommu@lists.linux-foundation.org \
--cc=jon@solid-run.com \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linuxarm@huawei.com \
--cc=robin.murphy@arm.com \
--cc=steven.price@arm.com \
--cc=wanghuiqiang@huawei.com \
--cc=yangyicong@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).