From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B484C433EF for ; Fri, 15 Oct 2021 01:49:41 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D307061090 for ; Fri, 15 Oct 2021 01:49:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org D307061090 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:CC:To:Subject:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=yNjxC0EAMyTZ/SbGpAZC1wF628ajTht2H+qYyhiBgFY=; b=tUGjwFh1Hzstb6Kurf+rfYSPR5 +gQEQi9gyYGhjhDviSEAf+vvs4Y/Z6QOTq8wCfouL0Pxa2aJk7FfiRE1LoCtucbXADYy+OfVmIdMG LDJCzd36gi8mL661ixJhvesJQ4h+/07eXyWTt1ktwmKGfi4F5yCr7+JUkmJDCmoQoNZM7C1XwcX2b CugFVm620/e/5tQd9zNJNgh/O1ZupEAsXQPkDh5SJx3nWd0Ow4T3nE7jtD1S0soyMmvmZs/t/x49T Yv/FEXwlTONwjuWFVyyTWWb2pb+/zt4CIvupr9OdI07TXz+lHtnWuUo153TVI1ftqoBUNiPILvpla BYbJ91kg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mbCKh-004yo4-Qe; Fri, 15 Oct 2021 01:48:27 +0000 Received: from szxga02-in.huawei.com ([45.249.212.188]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mbCKc-004ylG-JA for linux-arm-kernel@lists.infradead.org; Fri, 15 Oct 2021 01:48:24 +0000 Received: from dggemv711-chm.china.huawei.com (unknown [172.30.72.57]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4HVpvL2hJpz903c; Fri, 15 Oct 2021 09:43:26 +0800 (CST) Received: from dggpemm500002.china.huawei.com (7.185.36.229) by dggemv711-chm.china.huawei.com (10.1.198.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.8; Fri, 15 Oct 2021 09:48:17 +0800 Received: from [10.174.179.5] (10.174.179.5) by dggpemm500002.china.huawei.com (7.185.36.229) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.8; Fri, 15 Oct 2021 09:48:17 +0800 Subject: Re: Re: [PATCH net-next 2/4] io: add function to flush the write combine buffer to device immediately To: Will Deacon , Guangbin Huang CC: , , , , , , , , , , , References: <1627614864-50824-1-git-send-email-huangguangbin2@huawei.com> <1627614864-50824-3-git-send-email-huangguangbin2@huawei.com> <20210730090056.GA22968@willie-the-truck> From: Xiongfeng Wang Message-ID: Date: Fri, 15 Oct 2021 09:48:16 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 MIME-Version: 1.0 In-Reply-To: <20210730090056.GA22968@willie-the-truck> X-Originating-IP: [10.174.179.5] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To dggpemm500002.china.huawei.com (7.185.36.229) X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211014_184823_079797_E0A43C97 X-CRM114-Status: GOOD ( 21.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Will On 2021/7/30 17:00, Will Deacon wrote: > Hi, > > On Fri, Jul 30, 2021 at 11:14:22AM +0800, Guangbin Huang wrote: >> From: Xiongfeng Wang >> >> Device registers can be mapped as write-combine type. In this case, data >> are not written into the device immediately. They are temporarily stored >> in the write combine buffer and written into the device when the buffer >> is full. But in some situation, we need to flush the write combine >> buffer to device immediately for better performance. So we add a general >> function called 'flush_wc_write()'. We use DGH instruction to implement >> this function for ARM64. >> >> Signed-off-by: Xiongfeng Wang >> Signed-off-by: Guangbin Huang >> --- >> arch/arm64/include/asm/io.h | 2 ++ >> include/linux/io.h | 6 ++++++ >> 2 files changed, 8 insertions(+) > > -ENODOCUMENTATION > >> diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h >> index 7fd836bea7eb..5315d023b2dd 100644 >> --- a/arch/arm64/include/asm/io.h >> +++ b/arch/arm64/include/asm/io.h >> @@ -112,6 +112,8 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) >> #define __iowmb() dma_wmb() >> #define __iomb() dma_mb() >> >> +#define flush_wc_write() dgh() > > I think it would be worthwhile to look at what architectures other than > arm64 offer here. For example, is there anything similar to this on riscv, > x86 or power? Doing a quick survery of what's out there might help us define > a macro that can be used across multiple architectures. I searched in 'barrier.h' of different architectures and didn't find similar merge preventing instructions. Could you give me some advice on naming this common interface ? Thanks, Xiongfeng > > Thanks, > > Will > >> /* >> * Relaxed I/O memory access primitives. These follow the Device memory >> * ordering rules but do not guarantee any ordering relative to Normal memory >> diff --git a/include/linux/io.h b/include/linux/io.h >> index 9595151d800d..469d53444218 100644 >> --- a/include/linux/io.h >> +++ b/include/linux/io.h >> @@ -166,4 +166,10 @@ static inline void arch_io_free_memtype_wc(resource_size_t base, >> } >> #endif >> >> +/* IO barriers */ >> + >> +#ifndef flush_wc_write >> +#define flush_wc_write() do { } while (0) >> +#endif >> + >> #endif /* _LINUX_IO_H */ >> -- >> 2.8.1 >> > . > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel