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Thu, 27 Aug 2020 22:04:54 -0500 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 27 Aug 2020 22:04:53 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 27 Aug 2020 22:04:54 -0500 Received: from [10.24.69.198] (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 07S34pDZ086824; Thu, 27 Aug 2020 22:04:52 -0500 Subject: Re: [PATCH] arm64: dts: ti: k3-am65: restrict PCIe to Gen2 speed To: Nishanth Menon References: <20200802165356.10285-1-nsekhar@ti.com> <20200828002426.e7surnodpblgln7h@akan> From: Sekhar Nori Message-ID: Date: Fri, 28 Aug 2020 08:34:51 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 In-Reply-To: <20200828002426.e7surnodpblgln7h@akan> Content-Language: en-US X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200827_230456_155023_5D20C25A X-CRM114-Status: GOOD ( 17.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tero Kristo , Linux ARM Mailing List , Kishon Vijay Abraham I Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 28/08/20 5:54 AM, Nishanth Menon wrote: > On 10:13-20200827, Sekhar Nori wrote: >> Hi Nishanth, >> >> On 02/08/20 10:23 PM, Sekhar Nori wrote: >>> Per errata i2104 documented in AM65x device errata document (TI document >>> number SPRZ452E, revised June 2019), Gen3 operation is not supported for >>> both PCIe Root Complex and Endpoint modes of operation. >>> >>> See: https://www.ti.com/lit/er/sprz452e/sprz452e.pdf >>> >>> Restrict speed to Gen2 to address the errata. >>> >>> Signed-off-by: Sekhar Nori >> >> Is this in your queue or should I rebase and resend? > > Thanks for the reminder. I have put it on my staging branch for now. > Once rc3 gets tagged with irqchip related changes, I will move this over > to next. Hmm, this is errata fix and fair game for -rc cycle. Can we have this in v5.9 itself? > > Now, that said, Please consider converting > Documentation/devicetree/bindings/pci/pci-keystone.txt to yaml sometime > in near future, if possible. > > We might also want to spend a little more time with W=2 dtbs build and > dtbs_check to cleanup. Sure, will add to TODO. Thanks, Sekhar _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel