Re: [PATCH v1 2/5] coresight: etm4x: use explicit barriers on enable/disable

From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: mathieu.poirier@linaro.org, andrew.murray@arm.com
Cc: alexander.shishkin@linux.intel.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v1 2/5] coresight: etm4x: use explicit barriers on enable/disable
Date: Wed, 19 Jun 2019 09:32:56 +0100	[thread overview]
Message-ID: <e5b288ad-91bd-8854-469a-bee44bf202cf@arm.com> (raw)
In-Reply-To: <20190618223402.GA24894@xps15>

On 18/06/2019 23:34, Mathieu Poirier wrote:
> On Tue, Jun 18, 2019 at 01:54:30PM +0100, Andrew Murray wrote:
>> Synchronization is recommended before disabling the trace registers
>> to prevent any start or stop points being speculative at the point
>> of disabling the unit (section 7.3.77 of ARM IHI 0064D).
>>
>> Synchronization is also recommended after programming the trace
>> registers to ensure all updates are committed prior to normal code
>> resuming (section 4.3.7 of ARM IHI 0064D).
>>
>> Let's ensure these syncronization points are present in the code
>> and clearly commented.
>>
>> Note that we could rely on the barriers in CS_LOCK and
>> coresight_disclaim_device_unlocked or the context switch to user
>> space - however coresight may be of use in the kernel.
>>
>> Signed-off-by: Andrew Murray <andrew.murray@arm.com>
>> ---
>>   drivers/hwtracing/coresight/coresight-etm4x.c | 7 ++++++-
>>   1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
>> index da7cf74d612b..ae623415c431 100644
>> --- a/drivers/hwtracing/coresight/coresight-etm4x.c
>> +++ b/drivers/hwtracing/coresight/coresight-etm4x.c
>> @@ -187,6 +187,10 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata)
>>   		dev_err(drvdata->dev,
>>   			"timeout while waiting for Idle Trace Status\n");
>>   
>> +	/* As recommended by 4.3.7 of ARM IHI 0064D */
>> +	dsb(sy);
>> +	isb();
>> +

I think this should go to stable. Please Cc stable in the next version. or 
alternately you may add a "fixes" tag.

>>   done:
>>   	CS_LOCK(drvdata->base);
>>   
>> @@ -453,7 +457,8 @@ static void etm4_disable_hw(void *info)
>>   	control &= ~0x1;
>>   
>>   	/* make sure everything completes before disabling */
>> -	mb();
>> +	/* As recommended by 7.3.77 of ARM IHI 0064D */
>> +	dsb(sy);
> 
> As far as I can tell mb() is equal to dsb(sy).

Yes, however, given that etm4x is for armv8 cores, having the explicit dsb()
make sense to avoid someone looking up again to see what mb() translates to.
I suggested the dsb() over mb(), so that it is evident to someone who is trying
to correlate the TRM vs the code.

Cheers
Suzuki

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