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Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lgpJb-00AQTn-47 for linux-arm-kernel@lists.infradead.org; Wed, 12 May 2021 13:54:20 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7DFFC31B; Wed, 12 May 2021 06:54:14 -0700 (PDT) Received: from [10.57.71.192] (unknown [10.57.71.192]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BFDC73F718; Wed, 12 May 2021 06:54:13 -0700 (PDT) Subject: Re: [PATCH 1/2] arm64: Change the cpuinfo_arm64 member type for some sysregs to u64 To: Catalin Marinas , linux-arm-kernel@lists.infradead.org Cc: Will Deacon , Mark Rutland References: <20210511182322.3830-1-catalin.marinas@arm.com> <20210511182322.3830-2-catalin.marinas@arm.com> From: Suzuki K Poulose Message-ID: Date: Wed, 12 May 2021 14:54:12 +0100 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:78.0) Gecko/20100101 Thunderbird/78.10.1 MIME-Version: 1.0 In-Reply-To: <20210511182322.3830-2-catalin.marinas@arm.com> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210512_065419_245711_8F0C6060 X-CRM114-Status: GOOD ( 18.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 11/05/2021 19:23, Catalin Marinas wrote: > The architecture has been updated and the CTR_EL0, CNTFRQ_EL1, > DCZID_EL0, MIDR_EL1, REVIDR_EL1 registers are all 64-bit, even if most > of them have a RES0 top 32-bit. > > Change their type to u64 in struct cpuinfo_arm64. > > Signed-off-by: Catalin Marinas > Cc: Will Deacon > Cc: Mark Rutland > Cc: Suzuki K Poulose > --- > > CTR_EL0 gained a new field with MTE in the top 32-bit, TminLine. I have > no idea what software is supposed to do with this field. I even have a > Jira ticket from 2019 asking for it to be removed. So I don't think we > should bother adding the mask/checks for it to the kernel. > > arch/arm64/include/asm/cpu.h | 10 +++++----- > arch/arm64/kernel/cpuinfo.c | 2 +- > 2 files changed, 6 insertions(+), 6 deletions(-) > Reviewed-by: Suzuki K Poulose _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel