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Wed, 30 Jun 2021 13:00:00 -0700 (PDT) Received: from [192.168.1.101] ([92.176.231.106]) by smtp.gmail.com with ESMTPSA id o14sm25399wmq.1.2021.06.30.12.59.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Jun 2021 13:00:00 -0700 (PDT) Subject: Re: [PATCH v2] PCI: rockchip: Avoid accessing PCIe registers with clocks gated To: Bjorn Helgaas Cc: linux-kernel@vger.kernel.org, Peter Robinson , Shawn Lin , Bjorn Helgaas , Heiko Stuebner , Lorenzo Pieralisi , Rob Herring , linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org, Michal Simek , Jingoo Han , Thierry Reding , Jonathan Hunter , linux-tegra@vger.kernel.org References: <20210630185922.GA4170992@bjorn-Precision-5520> From: Javier Martinez Canillas Message-ID: Date: Wed, 30 Jun 2021 21:59:58 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: <20210630185922.GA4170992@bjorn-Precision-5520> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=javierm@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210630_130009_962330_78F3FE17 X-CRM114-Status: GOOD ( 24.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 6/30/21 8:59 PM, Bjorn Helgaas wrote: > [+cc Michal, Jingoo, Thierry, Jonathan] [snip] > > I think the above commit log is perfectly accurate, but all the > details might suggest that this is something specific to rockchip or > CONFIG_DEBUG_SHIRQ, which it isn't, and they might obscure the > fundamental problem, which is actually very simple: we registered IRQ > handlers before we were ready for them to be called. > > I propose the following commit log in the hope that it would help > other driver authors to make similar fixes: > > PCI: rockchip: Register IRQ handlers after device and data are ready > > An IRQ handler may be called at any time after it is registered, so > anything it relies on must be ready before registration. > > rockchip_pcie_subsys_irq_handler() and rockchip_pcie_client_irq_handler() > read registers in the PCIe controller, but we registered them before > turning on clocks to the controller. If either is called before the clocks > are turned on, the register reads fail and the machine hangs. > > Similarly, rockchip_pcie_legacy_int_handler() uses rockchip->irq_domain, > but we installed it before initializing irq_domain. > > Register IRQ handlers after their data structures are initialized and > clocks are enabled. > > If this is inaccurate or omits something important, let me know. I > can make any updates locally. > I think your description is accurate and agree that the commit message may be misleading. As you said, this is a general problem and the fact that an IRQ is shared and CONFIG_DEBUG_SHIRQ fires a spurious interrupt just make the assumptions in the driver to fall apart. But maybe you can also add a paragraph that mentions the CONFIG_DEBUG_SHIRQ option and shared interrupts? That way, other driver authors could know that by enabling this an underlying problem might be exposed for them to fix. Best regards, -- Javier Martinez Canillas Software Engineer New Platform Technologies Enablement team RHEL Engineering _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel