From: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
To: nick.hawkins@hpe.com, verdun@hpe.com
Cc: Arnd Bergmann <arnd@arndb.de>, Olof Johansson <olof@lixom.net>,
soc@kernel.org, Rob Herring <robh+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 09/10] arch: arm: boot: dts: Introduce HPE GXP Device tree
Date: Fri, 11 Mar 2022 11:29:53 +0100 [thread overview]
Message-ID: <eb66cc83-2da9-8e19-db69-633e34fef946@canonical.com> (raw)
In-Reply-To: <20220310195229.109477-9-nick.hawkins@hpe.com>
On 10/03/2022 20:52, nick.hawkins@hpe.com wrote:
> From: Nick Hawkins <nick.hawkins@hpe.com>
>
> The HPE SoC is new to linux. This patch
> creates the basic device tree layout with minimum required
> for linux to boot. This includes timer and watchdog
> support.
>
> Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
> ---
> arch/arm/boot/dts/Makefile | 2 +
> arch/arm/boot/dts/hpe-bmc-dl360gen10.dts | 27 +++++
> arch/arm/boot/dts/hpe-gxp.dtsi | 148 +++++++++++++++++++++++
> 3 files changed, 177 insertions(+)
> create mode 100644 arch/arm/boot/dts/hpe-bmc-dl360gen10.dts
> create mode 100644 arch/arm/boot/dts/hpe-gxp.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index e41eca79c950..2823b359d373 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1550,3 +1550,5 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> aspeed-bmc-vegman-n110.dtb \
> aspeed-bmc-vegman-rx20.dtb \
> aspeed-bmc-vegman-sx20.dtb
> +dtb-$(CONFIG_ARCH_HPE_GXP) += \
> + hpe-bmc-dl360gen10.dtb
Alphabetically, also in respect to other architectures, so before
CONFIG_ARCH_INTEGRATOR.
> diff --git a/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts b/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts
> new file mode 100644
> index 000000000000..da5eac1213a8
> --- /dev/null
> +++ b/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts
> @@ -0,0 +1,27 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree file for HPE DL360Gen10
> + */
> +
> +/include/ "hpe-gxp.dtsi"
> +
> +/ {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "hpe,gxp";
Missing board compatible.
> + model = "Hewlett Packard Enterprise ProLiant dl360 Gen10";
> +
> + chosen {
> + bootargs = "earlyprintk console=ttyS2,115200";
I have impression we talked about it...
> + };
> +
> + memory@40000000 {
> + device_type = "memory";
> + reg = <0x40000000 0x20000000>;
> + };
> +
> + ahb {
Why do you need empty node?
> +
> + };
> +
> +};
> diff --git a/arch/arm/boot/dts/hpe-gxp.dtsi b/arch/arm/boot/dts/hpe-gxp.dtsi
> new file mode 100644
> index 000000000000..dfaf8df829fe
> --- /dev/null
> +++ b/arch/arm/boot/dts/hpe-gxp.dtsi
> @@ -0,0 +1,148 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree file for HPE GXP
> + */
> +
> +/dts-v1/;
> +/ {
> + model = "Hewlett Packard Enterprise GXP BMC";
> + compatible = "hpe,gxp";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu@0 {
> + compatible = "arm,cortex-a9";
> + device_type = "cpu";
> + reg = <0>;
> + };
> + };
> +
> + gxp-init@cefe0010 {
Need a generic node name. gpx-init is specific.
> + compatible = "hpe,gxp-cpu-init";
> + reg = <0xcefe0010 0x04>;
> + };
> +
> + memory@40000000 {
> + device_type = "memory";
> + reg = <0x40000000 0x20000000>;
> + };
> +
> + ahb {
By convention we call it soc.
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + device_type = "soc";
> + ranges;
> +
> + vic0: interrupt-controller@ceff0000 {
> + compatible = "arm,pl192-vic";
> + interrupt-controller;
> + reg = <0xceff0000 0x1000>;
Please put reg after compatible, everywhere.
> + #interrupt-cells = <1>;
> + };
> +
> + vic1: interrupt-controller@80f00000 {
> + compatible = "arm,pl192-vic";
> + interrupt-controller;
> + reg = <0x80f00000 0x1000>;
> + #interrupt-cells = <1>;
> + };
> +
> + timer0: timer@c0000080 {
> + compatible = "hpe,gxp-timer";
> + reg = <0xc0000080 0x1>, <0xc0000094 0x01>, <0xc0000088 0x08>;
> + interrupts = <0>;
> + interrupt-parent = <&vic0>;
> + clock-frequency = <400000000>;
> + };
> +
> + uarta: serial@c00000e0 {
> + compatible = "ns16550a";
> + reg = <0xc00000e0 0x8>;
> + interrupts = <17>;
> + interrupt-parent = <&vic0>;
> + clock-frequency = <1846153>;
> + reg-shift = <0>;
> + };
> +
> + uartb: serial@c00000e8 {
> + compatible = "ns16550a";
> + reg = <0xc00000e8 0x8>;
> + interrupts = <18>;
> + interrupt-parent = <&vic0>;
> + clock-frequency = <1846153>;
> + reg-shift = <0>;
> + };
> +
> + uartc: serial@c00000f0 {
> + compatible = "ns16550a";
> + reg = <0xc00000f0 0x8>;
> + interrupts = <19>;
> + interrupt-parent = <&vic0>;
> + clock-frequency = <1846153>;
> + reg-shift = <0>;
> + };
> +
> + usb0: usb@cefe0000 {
> + compatible = "generic-ehci";
I think one of previous comments was that you cannot have "generic-ehci"
only, right?
> + reg = <0xcefe0000 0x100>;
> + interrupts = <7>;
> + interrupt-parent = <&vic0>;
> + };
> +
> + usb1: usb@cefe0100 {
> + compatible = "generic-ohci";
> + reg = <0xcefe0100 0x110>;
> + interrupts = <6>;
> + interrupt-parent = <&vic0>;
> + };
> +
> + vrom@58000000 {
> + compatible = "mtd-ram";
> + bank-width = <4>;
> + reg = <0x58000000 0x4000000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + partition@0 {
> + label = "vrom-prime";
> + reg = <0x0 0x2000000>;
> + };
> + partition@2000000 {
> + label = "vrom-second";
> + reg = <0x2000000 0x2000000>;
> + };
> + };
> +
> + i2cg: syscon@c00000f8 {
> + compatible = "simple-mfd", "syscon";
> + reg = <0xc00000f8 0x08>;
> + };
> + };
> +
> + clocks {
> + osc: osc {
Keep node naming consistent, so just "clk"... but it's also very generic
comparing to others, so I wonder what is this clock?
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-output-names = "osc";
> + clock-frequency = <33333333>;
> + };
> +
> + iopclk: iopclk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-output-names = "iopclk";
> + clock-frequency = <400000000>;
> + };
> +
> + memclk: memclk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-output-names = "memclk";
> + clock-frequency = <800000000>;
> + };
What are these clocks? If external to the SoC, then where are they? On
the board?
> + };
> +};
Best regards,
Krzysztof
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next prev parent reply other threads:[~2022-03-11 10:31 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-10 19:52 [PATCH v3 01/10] arch: arm: mach-hpe: Introduce the HPE GXP architecture nick.hawkins
2022-03-10 19:52 ` [PATCH v3 02/10] arch: arm: configs: multi_v7_defconfig nick.hawkins
2022-03-10 19:52 ` [PATCH v3 09/10] arch: arm: boot: dts: Introduce HPE GXP Device tree nick.hawkins
2022-03-11 8:17 ` Arnd Bergmann
2022-03-11 10:29 ` Krzysztof Kozlowski [this message]
2022-03-16 15:41 ` Hawkins, Nick
2022-03-16 15:50 ` Krzysztof Kozlowski
2022-03-16 20:10 ` Hawkins, Nick
2022-03-17 8:36 ` Krzysztof Kozlowski
2022-03-29 19:38 ` Hawkins, Nick
2022-03-29 21:13 ` Arnd Bergmann
2022-03-29 21:45 ` Hawkins, Nick
2022-03-30 22:27 ` Hawkins, Nick
2022-03-31 9:30 ` Arnd Bergmann
2022-03-31 21:09 ` Hawkins, Nick
2022-03-31 21:52 ` Arnd Bergmann
2022-04-01 16:05 ` Hawkins, Nick
2022-04-01 16:30 ` Arnd Bergmann
2022-04-04 20:22 ` Hawkins, Nick
2022-04-04 22:02 ` Arnd Bergmann
2022-04-05 21:21 ` Hawkins, Nick
2022-04-06 7:24 ` Arnd Bergmann
2022-04-13 16:48 ` Hawkins, Nick
2022-04-13 17:42 ` Arnd Bergmann
2022-03-11 7:21 ` [PATCH v3 01/10] arch: arm: mach-hpe: Introduce the HPE GXP architecture kernel test robot
2022-03-11 8:06 ` Arnd Bergmann
2022-03-11 12:40 ` kernel test robot
2022-03-12 13:27 ` kernel test robot
2022-03-12 15:14 ` Arnd Bergmann
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