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Fri, 15 Feb 2019 00:19:53 -0600 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Fri, 15 Feb 2019 00:19:52 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Fri, 15 Feb 2019 00:19:52 -0600 Received: from [172.24.190.233] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id x1F6JmOD016900; Fri, 15 Feb 2019 00:19:49 -0600 Subject: Re: [PATCH v2 08/15] PCI: endpoint: Fix pci_epf_alloc_space to set correct MEM TYPE flags To: Lorenzo Pieralisi References: <20190114111513.21618-1-kishon@ti.com> <20190114111513.21618-9-kishon@ti.com> <20190211173723.GA31035@e107981-ln.cambridge.arm.com> <20190214162928.GA32523@e107981-ln.cambridge.arm.com> From: Kishon Vijay Abraham I Message-ID: Date: Fri, 15 Feb 2019 11:49:12 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 MIME-Version: 1.0 In-Reply-To: <20190214162928.GA32523@e107981-ln.cambridge.arm.com> Content-Language: en-US X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190214_222002_543477_CF244516 X-CRM114-Status: GOOD ( 18.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Heiko Stuebner , Gustavo Pimentel , Shawn Lin , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Alan Douglas , Jingoo Han , Bjorn Helgaas , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Lorenzo, On 14/02/19 9:59 PM, Lorenzo Pieralisi wrote: > On Wed, Feb 13, 2019 at 07:17:14PM +0530, Kishon Vijay Abraham I wrote: >> Hi Lorenzo, >> >> On 11/02/19 11:07 PM, Lorenzo Pieralisi wrote: >>> On Mon, Jan 14, 2019 at 04:45:06PM +0530, Kishon Vijay Abraham I wrote: >>>> pci_epf_alloc_space() sets the MEM TYPE flags to indicate a 32-bit >>>> Base Address Register irrespective of the size. Fix it here to indicate >>>> 64-bit BAR if the size is > 2GB. >>>> >>>> Signed-off-by: Kishon Vijay Abraham I >>>> --- >>>> drivers/pci/endpoint/pci-epf-core.c | 4 +++- >>>> 1 file changed, 3 insertions(+), 1 deletion(-) >>> >>> This looks like a fix and should me marked as such. Does it work >>> as as standalone patch if it gets backported ? >> >> Yeah, it should work. But the current users doesn't allocate > 2GB and some >> EPC drivers configure their registers based on size. So nothing is broken >> without this patch as such. > > I suspect you mean 4GB (here and the commit log), right ? I am checking > the commit logs, aiming at merging the patches. A 32bit BAR register can support a 'size' of only up to 2GB. Though it can hold a memory address of up to 4GB. This is also mentioned in the PCI Local Bus Specification. "A 32-bit register can be implemented to support a single memory size that is a power of 2 from 16 bytes to 2 GB" Thanks Kishon _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel