From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Mathieu Poirier <mathieu.poirier@linaro.org>,
Anshuman Khandual <anshuman.khandual@arm.com>
Cc: linux-kernel@vger.kernel.org, coresight@lists.linaro.org,
lcherian@marvell.com, linux-arm-kernel@lists.infradead.org,
mike.leach@linaro.org
Subject: Re: [PATCH V3 05/14] coresight: ete: Add support for ETE tracing
Date: Tue, 2 Feb 2021 22:50:13 +0000 [thread overview]
Message-ID: <f4e8471a-872b-7733-eaa4-387530564e0e@arm.com> (raw)
In-Reply-To: <20210202185639.GE1536093@xps15>
On 2/2/21 6:56 PM, Mathieu Poirier wrote:
> On Wed, Jan 27, 2021 at 02:25:29PM +0530, Anshuman Khandual wrote:
>> From: Suzuki K Poulose <suzuki.poulose@arm.com>
>>
>> Add ETE as one of the supported device types we support
>> with ETM4x driver. The devices are named following the
>> existing convention as ete<N>.
>>
>> ETE mandates that the trace resource status register is programmed
>> before the tracing is turned on. For the moment simply write to
>> it indicating TraceActive.
>>
>> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
>> Cc: Mike Leach <mike.leach@linaro.org>
>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
>> ---
...
>> @@ -1834,10 +1854,6 @@ static int etm4_probe(struct device *dev, void __iomem *base, u32 etm_pid)
>> if (drvdata->cpu < 0)
>> return drvdata->cpu;
>>
>> - desc.name = devm_kasprintf(dev, GFP_KERNEL, "etm%d", drvdata->cpu);
>> - if (!desc.name)
>> - return -ENOMEM;
>> -
>> init_arg.drvdata = drvdata;
>> init_arg.csa = &desc.access;
>> init_arg.pid = etm_pid;
>> @@ -1853,6 +1869,20 @@ static int etm4_probe(struct device *dev, void __iomem *base, u32 etm_pid)
>> if (!desc.access.io_mem ||
>> fwnode_property_present(dev_fwnode(dev), "qcom,skip-power-up"))
>> drvdata->skip_power_up = true;
>
> Add a space here...
>
>> + major = ETM_ARCH_MAJOR_VERSION(drvdata->arch);
>> + minor = ETM_ARCH_MINOR_VERSION(drvdata->arch);
>
> And here too. Othersiwe it makes a big blob in the middle of the function.
>
>> + if (etm4x_is_ete(drvdata)) {
>> + type_name = "ete";
>> + /* ETE v1 has major version == 5. Adjust this for logging.*/
>> + major -= 4;
>
> I don't have the documentation for the ETE but I would not adjust @major. I
> would simply leave it to what the HW gives us since regardless of the name, the
> major revision of the IP block is 5.
>
At the moment only register definitions are public and can be found here :
https://developer.arm.com/docs/ddi0601/g/aarch64-system-registers/trcdevarch
The ETE is natural extension of the ETM architecture to support future
architecture changes and is designed in a way that the same software
can driver both ETM and ETE without much changes.
>> diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h
>> index ca24ac5..8b90de5 100644
>> --- a/drivers/hwtracing/coresight/coresight-etm4x.h
>> +++ b/drivers/hwtracing/coresight/coresight-etm4x.h
>> @@ -128,6 +128,8 @@
>> #define TRCCIDR2 0xFF8
>> #define TRCCIDR3 0xFFC
>>
>> +#define TRCRSR_TA BIT(12)
>> +
>> /*
>> * System instructions to access ETM registers.
>> * See ETMv4.4 spec ARM IHI0064F section 4.3.6 System instructions
>> @@ -390,6 +392,9 @@
>> #define ETM_COMMON_SYSREG_LIST_CASES \
>> ETM_COMMON_SYSREG_LIST(NOP, __unused)
>>
>> +#define ETM4x_ONLY_SYSREG_LIST_CASES \
>> + ETM4x_ONLY_SYSREG_LIST(NOP, __unused)
>> +
>> #define ETM4x_SYSREG_LIST_CASES \
>> ETM_COMMON_SYSREG_LIST_CASES \
>> ETM4x_ONLY_SYSREG_LIST(NOP, __unused)
>> @@ -406,7 +411,6 @@
>> ETE_ONLY_SYSREG_LIST(WRITE, (val))
>>
>> #define ETE_ONLY_SYSREG_LIST_CASES \
>> - ETM_COMMON_SYSREG_LIST_CASES \
>
> This goes in patch 04.
>
Sure, will move it.
> With the above:
>
> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Thanks for the review
Suzuki
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next prev parent reply other threads:[~2021-02-02 22:51 UTC|newest]
Thread overview: 91+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-27 8:55 [PATCH V3 00/14] arm64: coresight: Enable ETE and TRBE Anshuman Khandual
2021-01-27 8:55 ` [PATCH V3 01/14] coresight: etm-perf: Allow an event to use different sinks Anshuman Khandual
2021-02-01 23:17 ` Mathieu Poirier
2021-02-02 9:42 ` Suzuki K Poulose
2021-02-02 16:33 ` Mike Leach
2021-02-02 22:41 ` Suzuki K Poulose
2021-02-04 12:27 ` Mike Leach
2021-02-02 16:37 ` Mathieu Poirier
2021-01-27 8:55 ` [PATCH V3 02/14] coresight: Do not scan for graph if none is present Anshuman Khandual
2021-02-01 23:44 ` Mathieu Poirier
2021-02-02 11:10 ` Mike Leach
2021-02-02 14:36 ` Suzuki K Poulose
2021-01-27 8:55 ` [PATCH V3 03/14] coresight: etm4x: Add support for PE OS lock Anshuman Khandual
2021-02-02 17:40 ` Mathieu Poirier
2021-02-02 18:03 ` Mathieu Poirier
2021-02-15 14:08 ` Mike Leach
2021-01-27 8:55 ` [PATCH V3 04/14] coresight: ete: Add support for ETE sysreg access Anshuman Khandual
2021-02-02 17:52 ` Mathieu Poirier
2021-02-03 15:51 ` Suzuki K Poulose
2021-02-15 14:08 ` Mike Leach
2021-01-27 8:55 ` [PATCH V3 05/14] coresight: ete: Add support for ETE tracing Anshuman Khandual
2021-02-02 18:56 ` Mathieu Poirier
2021-02-02 22:50 ` Suzuki K Poulose [this message]
2021-02-15 13:21 ` Mike Leach
2021-02-15 14:08 ` Mike Leach
2021-01-27 8:55 ` [PATCH V3 06/14] dts: bindings: Document device tree bindings for ETE Anshuman Khandual
2021-02-09 19:00 ` Rob Herring
2021-02-10 12:33 ` Suzuki K Poulose
2021-02-18 18:33 ` Rob Herring
2021-02-18 22:51 ` Suzuki K Poulose
2021-01-27 8:55 ` [PATCH V3 07/14] coresight: etm-perf: Handle stale output handles Anshuman Khandual
2021-02-03 19:05 ` Mathieu Poirier
2021-02-03 23:36 ` Suzuki K Poulose
2021-02-15 16:27 ` Mike Leach
2021-01-27 8:55 ` [PATCH V3 08/14] coresight: core: Add support for dedicated percpu sinks Anshuman Khandual
2021-01-28 9:16 ` Suzuki K Poulose
2021-02-04 18:34 ` Mathieu Poirier
2021-02-16 10:40 ` Anshuman Khandual
2021-02-16 20:44 ` Mathieu Poirier
2021-02-16 10:21 ` Anshuman Khandual
2021-02-15 16:27 ` Mike Leach
2021-02-15 16:56 ` Mathieu Poirier
2021-02-15 17:58 ` Mike Leach
2021-02-16 20:30 ` Mathieu Poirier
2021-01-27 8:55 ` [PATCH V3 09/14] arm64: Add TRBE definitions Anshuman Khandual
2021-01-28 9:31 ` Suzuki K Poulose
2021-01-28 17:18 ` Catalin Marinas
2021-02-15 18:06 ` Mike Leach
2021-01-27 8:55 ` [PATCH V3 10/14] arm64: nvhe: Allow TRBE access at EL1 Anshuman Khandual
2021-01-27 9:58 ` Marc Zyngier
2021-01-28 9:34 ` Suzuki K Poulose
2021-01-28 9:46 ` Marc Zyngier
2021-01-28 9:48 ` Suzuki K Poulose
2021-01-27 8:55 ` [PATCH V3 11/14] coresight: sink: Add TRBE driver Anshuman Khandual
2021-01-29 10:23 ` Suzuki K Poulose
2021-02-02 5:55 ` Anshuman Khandual
2021-02-05 17:53 ` Mathieu Poirier
2021-02-08 4:20 ` Anshuman Khandual
2021-02-09 17:39 ` Mathieu Poirier
2021-02-10 4:12 ` Anshuman Khandual
2021-02-10 16:54 ` Mathieu Poirier
2021-02-10 19:00 ` Mathieu Poirier
2021-02-12 5:43 ` Anshuman Khandual
2021-02-12 17:02 ` Mathieu Poirier
2021-02-11 19:00 ` Mathieu Poirier
2021-02-12 3:31 ` Anshuman Khandual
2021-02-12 16:57 ` Mathieu Poirier
2021-02-15 9:26 ` Anshuman Khandual
2021-02-12 20:26 ` Mathieu Poirier
2021-02-15 9:46 ` Anshuman Khandual
2021-02-16 9:00 ` Mike Leach
2021-02-16 9:44 ` Anshuman Khandual
2021-02-16 12:12 ` Mike Leach
2021-02-18 7:50 ` Suzuki K Poulose
2021-02-18 14:30 ` Mike Leach
2021-02-18 15:14 ` Suzuki K Poulose
2021-02-22 10:42 ` Mike Leach
2021-01-27 8:55 ` [PATCH V3 12/14] dts: bindings: Document device tree bindings for Arm TRBE Anshuman Khandual
2021-02-09 19:04 ` Rob Herring
2021-01-27 8:55 ` [PATCH V3 13/14] perf: aux: Add flags for the buffer format Anshuman Khandual
2021-01-27 12:51 ` Peter Zijlstra
2021-02-16 10:59 ` Mike Leach
2021-01-27 8:55 ` [PATCH V3 14/14] coresight: etm-perf: Add support for trace " Anshuman Khandual
2021-01-27 12:54 ` Peter Zijlstra
2021-01-27 13:00 ` Al Grant
2021-02-18 3:05 ` Anshuman Khandual
2021-01-27 14:12 ` Suzuki K Poulose
2021-02-16 11:01 ` Mike Leach
2021-01-27 18:50 ` [PATCH V3 00/14] arm64: coresight: Enable ETE and TRBE Mathieu Poirier
2021-02-01 18:44 ` Mathieu Poirier
2021-02-18 4:23 ` Anshuman Khandual
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