[RESEND PATCH v1 2/6] i2c: i2c-stm32f7: Add slave support

[pierre-yves.mordret@st.com (Pierre Yves MORDRET)]

Hi Wolfram

STM32 I2C F7 can be both Master and Slave mode.
Whenever a master command (I2C or SMBus) a START condition is generated and the
master flag (master_mode) is set and managed accordingly : sw and ITs/
Now if a slave is registered it's managed accordingly as long as there is no
master command on going.
IRqs are not separated neither Regs bits. The routing is done though out START
condition.
This driver is not slave-only driver and can act as master if a master command
is issued and slave if registered as such.

Hope it clarifies
Regards

On 03/20/2018 11:17 AM, Pierre Yves MORDRET wrote:
> 
> 
> On 03/20/2018 10:52 AM, Wolfram Sang wrote:
>>
>>> I do believe the hw can support it, even it looks odd to me having the same I2C
>>> in slave and master mode at the same time.
>>
>> I2C is multi-master, so it is perfectly valid for a device to be master
>> and slave. I do have seen designs making use of that more than once.
>>
>>> Nevertheless the driver is devised to support either master or slave more but
>>> not at the same time.
>>
>> Why should we limit ourselves here? Also, why should we have an
>> unnecessary configuration option?
>>
>> Unless the HW is broken and does not support it, I usually don't accept
>> slave-only solutions. If the needs for master and slave arises later,
>> this is hard to refactor and better done properly right away.
>>
>> Is it so hard? Usually you have irqs for master and for slave seperated,
>> so you can code things quite orthogonal. Check de20d1857dd6 ("i2c: rcar:
>> add slave support") as an example.
>>
> 
> I need to check at my end but status bits are shared between master and slave in
> my IP: i.e. Tx Empty, Rx Empty, NAxk, Stop.
> Both bits have a meaning in either master and slave mode. In your case status
> bits are separated between master and slave.
> BTW I need to think about it.
>