From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, T_DKIMWL_WL_HIGH,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D7BA4C28CC0 for ; Wed, 29 May 2019 13:33:52 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A379F21882 for ; Wed, 29 May 2019 13:33:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Pj7LuCe4" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A379F21882 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:To:Subject:Reply-To:Content-ID:Content-Description :Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=gexsppWGNZl6bosuF068B70fLunRoKfGQGmJHDLue1I=; b=Pj7LuCe4JYlHrK iFD7a24CEyVySZqcH3ZiD83xnj7z/+lfjdSXhrHE0TR2Jg+eOWeT9df6qpB4A5A/Il/ZturSyVWJW dt9wEP6VYyxrFjXXyxpqNiXaXa1yt2czYXFAVoc70j0GXELHZbhHkU9MZepbFAGFyuZSQ0/aKPvjq H+ashnPV3GcenbhqlZf3wodTiSYqE/JdvFY4fXT2RXyGgxJylcwGsbZu1I1xFo/wcN8K0g0ArkaYa o6RLWIvu8NlLSb9isNX124NDz035JdHi+GQpSPoliD38fQhfTZtny5Htgo6chq21xZbJy1NuL2Asu +feXDp4nW4VLXuQGZAGQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hVyiD-0006Tj-4N; Wed, 29 May 2019 13:33:49 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hVyi9-0006S3-SW for linux-arm-kernel@lists.infradead.org; Wed, 29 May 2019 13:33:47 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DDCF280D; Wed, 29 May 2019 06:33:43 -0700 (PDT) Received: from [10.1.197.61] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DE3F33F59C; Wed, 29 May 2019 06:33:40 -0700 (PDT) Subject: Re: [PATCH v4 01/10] ata: libahci: Ensure the host interrupt status bits are cleared To: Miquel Raynal References: <20190521143023.31810-1-miquel.raynal@bootlin.com> <20190521143023.31810-2-miquel.raynal@bootlin.com> <53ce8c5b-46fc-c969-5168-18e4bcc62cde@arm.com> <20190529120833.29334c70@xps13> <409ea2c5-c31a-fb6a-22c6-98b45e767809@arm.com> <20190529141356.1d9f03f3@xps13> From: Marc Zyngier Openpgp: preference=signencrypt Autocrypt: addr=marc.zyngier@arm.com; prefer-encrypt=mutual; keydata= mQINBE6Jf0UBEADLCxpix34Ch3kQKA9SNlVQroj9aHAEzzl0+V8jrvT9a9GkK+FjBOIQz4KE g+3p+lqgJH4NfwPm9H5I5e3wa+Scz9wAqWLTT772Rqb6hf6kx0kKd0P2jGv79qXSmwru28vJ t9NNsmIhEYwS5eTfCbsZZDCnR31J6qxozsDHpCGLHlYym/VbC199Uq/pN5gH+5JHZyhyZiNW ozUCjMqC4eNW42nYVKZQfbj/k4W9xFfudFaFEhAf/Vb1r6F05eBP1uopuzNkAN7vqS8XcgQH qXI357YC4ToCbmqLue4HK9+2mtf7MTdHZYGZ939OfTlOGuxFW+bhtPQzsHiW7eNe0ew0+LaL 3wdNzT5abPBscqXWVGsZWCAzBmrZato+Pd2bSCDPLInZV0j+rjt7MWiSxEAEowue3IcZA++7 ifTDIscQdpeKT8hcL+9eHLgoSDH62SlubO/y8bB1hV8JjLW/jQpLnae0oz25h39ij4ijcp8N t5slf5DNRi1NLz5+iaaLg4gaM3ywVK2VEKdBTg+JTg3dfrb3DH7ctTQquyKun9IVY8AsxMc6 lxl4HxrpLX7HgF10685GG5fFla7R1RUnW5svgQhz6YVU33yJjk5lIIrrxKI/wLlhn066mtu1 DoD9TEAjwOmpa6ofV6rHeBPehUwMZEsLqlKfLsl0PpsJwov8TQARAQABtCNNYXJjIFp5bmdp ZXIgPG1hcmMuenluZ2llckBhcm0uY29tPokCOwQTAQIAJQIbAwYLCQgHAwIGFQgCCQoLBBYC AwECHgECF4AFAk6NvYYCGQEACgkQI9DQutE9ekObww/+NcUATWXOcnoPflpYG43GZ0XjQLng LQFjBZL+CJV5+1XMDfz4ATH37cR+8gMO1UwmWPv5tOMKLHhw6uLxGG4upPAm0qxjRA/SE3LC 22kBjWiSMrkQgv5FDcwdhAcj8A+gKgcXBeyXsGBXLjo5UQOGvPTQXcqNXB9A3ZZN9vS6QUYN TXFjnUnzCJd+PVI/4jORz9EUVw1q/+kZgmA8/GhfPH3xNetTGLyJCJcQ86acom2liLZZX4+1 6Hda2x3hxpoQo7pTu+XA2YC4XyUstNDYIsE4F4NVHGi88a3N8yWE+Z7cBI2HjGvpfNxZnmKX 6bws6RQ4LHDPhy0yzWFowJXGTqM/e79c1UeqOVxKGFF3VhJJu1nMlh+5hnW4glXOoy/WmDEM UMbl9KbJUfo+GgIQGMp8mwgW0vK4HrSmevlDeMcrLdfbbFbcZLNeFFBn6KqxFZaTd+LpylIH bOPN6fy1Dxf7UZscogYw5Pt0JscgpciuO3DAZo3eXz6ffj2NrWchnbj+SpPBiH4srfFmHY+Y LBemIIOmSqIsjoSRjNEZeEObkshDVG5NncJzbAQY+V3Q3yo9og/8ZiaulVWDbcpKyUpzt7pv cdnY3baDE8ate/cymFP5jGJK++QCeA6u6JzBp7HnKbngqWa6g8qDSjPXBPCLmmRWbc5j0lvA 6ilrF8m5Ag0ETol/RQEQAM/2pdLYCWmf3rtIiP8Wj5NwyjSL6/UrChXtoX9wlY8a4h3EX6E3 64snIJVMLbyr4bwdmPKULlny7T/R8dx/mCOWu/DztrVNQiXWOTKJnd/2iQblBT+W5W8ep/nS w3qUIckKwKdplQtzSKeE+PJ+GMS+DoNDDkcrVjUnsoCEr0aK3cO6g5hLGu8IBbC1CJYSpple VVb/sADnWF3SfUvJ/l4K8Uk4B4+X90KpA7U9MhvDTCy5mJGaTsFqDLpnqp/yqaT2P7kyMG2E w+eqtVIqwwweZA0S+tuqput5xdNAcsj2PugVx9tlw/LJo39nh8NrMxAhv5aQ+JJ2I8UTiHLX QvoC0Yc/jZX/JRB5r4x4IhK34Mv5TiH/gFfZbwxd287Y1jOaD9lhnke1SX5MXF7eCT3cgyB+ hgSu42w+2xYl3+rzIhQqxXhaP232t/b3ilJO00ZZ19d4KICGcakeiL6ZBtD8TrtkRiewI3v0 o8rUBWtjcDRgg3tWx/PcJvZnw1twbmRdaNvsvnlapD2Y9Js3woRLIjSAGOijwzFXSJyC2HU1 AAuR9uo4/QkeIrQVHIxP7TJZdJ9sGEWdeGPzzPlKLHwIX2HzfbdtPejPSXm5LJ026qdtJHgz BAb3NygZG6BH6EC1NPDQ6O53EXorXS1tsSAgp5ZDSFEBklpRVT3E0NrDABEBAAGJAh8EGAEC AAkFAk6Jf0UCGwwACgkQI9DQutE9ekMLBQ//U+Mt9DtFpzMCIHFPE9nNlsCm75j22lNiw6mX mx3cUA3pl+uRGQr/zQC5inQNtjFUmwGkHqrAw+SmG5gsgnM4pSdYvraWaCWOZCQCx1lpaCOl MotrNcwMJTJLQGc4BjJyOeSH59HQDitKfKMu/yjRhzT8CXhys6R0kYMrEN0tbe1cFOJkxSbV 0GgRTDF4PKyLT+RncoKxQe8lGxuk5614aRpBQa0LPafkirwqkUtxsPnarkPUEfkBlnIhAR8L kmneYLu0AvbWjfJCUH7qfpyS/FRrQCoBq9QIEcf2v1f0AIpA27f9KCEv5MZSHXGCdNcbjKw1 39YxYZhmXaHFKDSZIC29YhQJeXWlfDEDq6nIhvurZy3mSh2OMQgaIoFexPCsBBOclH8QUtMk a3jW/qYyrV+qUq9Wf3SKPrXf7B3xB332jFCETbyZQXqmowV+2b3rJFRWn5hK5B+xwvuxKyGq qDOGjof2dKl2zBIxbFgOclV7wqCVkhxSJi/QaOj2zBqSNPXga5DWtX3ekRnJLa1+ijXxmdjz hApihi08gwvP5G9fNGKQyRETePEtEAWt0b7dOqMzYBYGRVr7uS4uT6WP7fzOwAJC4lU7ZYWZ yVshCa0IvTtp1085RtT3qhh9mobkcZ+7cQOY+Tx2RGXS9WeOh2jZjdoWUv6CevXNQyOUXMM= Organization: ARM Ltd Message-ID: Date: Wed, 29 May 2019 14:33:39 +0100 User-Agent: Mozilla/5.0 (X11; Linux aarch64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 MIME-Version: 1.0 In-Reply-To: <20190529141356.1d9f03f3@xps13> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190529_063345_934941_E4A62402 X-CRM114-Status: GOOD ( 24.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Andrew Lunn , raymond pang , Jason Cooper , Nadav Haklai , devicetree@vger.kernel.org, Antoine Tenart , Gregory Clement , Baruch Siach , Maxime Chevallier , linux-ide@vger.kernel.org, Hans de Goede , Rob Herring , Jens Axboe , Thomas Petazzoni , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 29/05/2019 13:13, Miquel Raynal wrote: > Hi Marc, > > Marc Zyngier wrote on Wed, 29 May 2019 11:37:58 > +0100: > >> On 29/05/2019 11:08, Miquel Raynal wrote: >>> Hi Marc & Raymond, >>> >>> Marc Zyngier wrote on Thu, 23 May 2019 10:26:01 >>> +0100: >>> >>>> On 23/05/2019 04:11, raymond pang wrote: >>>>> Hi Miquel, >>>>> >>>>> This patch adds clearing GHC.IS into hot path, could you explain how >>>>> irq storm is generated? thanks >>>>> According to AHCI Spec, HBA should not refer to GHC.IS to generate >>>>> MSI when applying multiple MSIs. >>>> >>>> Well spotted. >>>> >>>> I have the ugly feeling that this is because the Marvell AHCI >>>> implementation is not using MSIs at all, but instead a pair of wired >>>> interrupts (which are level triggered instead of edge, hence the >>>> screaming interrupts). >>>> >>>> The changes in the following patches abuse the rest of the driver by >>>> pretending this is a a multi-MSI setup, while it clearly doesn't match >>>> the expectation of the AHCI spec for MSIs. >>>> >>>> It looks like this shouldn't be imposed on other unsuspecting >>>> implementations which correctly use edge-triggered MSIs and do not >>>> require such an MMIO access. >>> >>> I understand your concern, let me add a AHCI_HFLAG_LEVEL_MSI in >>> hpriv->flags which will be used by the mvebu_ahci.c driver to request >>> for this MMIO access. This way, the hot path remains the same. >> >> I'm not convinced that's a good idea, if only because from the PoV of >> the AHCI device itself, these are not MSIs at all, but wired interrupts. >> The fact that there is some glue logic in the middle that turns it into >> a message (and then back into a wire) is a regrettable implementation >> detail. >> >> I'd rather you stick to the normal interrupt handler, or provide your >> own, which would solve most problems. > > Unless I don't understand your proposal, "stick to the normal interrupt > handler" is not possible as I need this register write to happen at > this time, not at any other moment. > > However, on the possibility of having a separate interrupt handler, I > may use the new AHCI_HFALG_LEVEL_MSI flag to change the > devm_request_irq call here [1] and use my own at this moment. The > handler will be in libahci.c though. > > Would this be a better approach? Again, level-triggered MSIs are not a property of the AHCI block. If anything, that's a property of the ICU block. Please do not conflate the two. What you have here is a set of wired interrupts, one per port. I'd suggest you implement it a separate interrupt handler keyed on a particular flag if you cannot detect this case by other means. Thanks, M. -- Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel