From: <Eugen.Hristev@microchip.com>
To: <adrian.hunter@intel.com>, <Nicolas.Ferre@microchip.com>,
<alexandre.belloni@bootlin.com>, <ulf.hansson@linaro.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-mmc@vger.kernel.org>
Subject: Re: [PATCH 2/2] ARM: dts: at91: sama5d27_som1_ek: add mmc capabilities for SDMMC0
Date: Mon, 12 Aug 2019 15:38:34 +0000 [thread overview]
Message-ID: <fa0debbb-b84c-1f74-f8b8-8fdd7812aaee@microchip.com> (raw)
In-Reply-To: <20190809062322.syuieymdqjs4e7lh@M43218.corp.atmel.com>
On 09.08.2019 09:23, Ludovic Desroches wrote:
> On Thu, Aug 08, 2019 at 03:57:30PM +0300, Adrian Hunter wrote:
>> On 8/08/19 3:42 PM, Ludovic Desroches wrote:
>>> On Thu, Aug 08, 2019 at 10:35:43AM +0200, Eugen Hristev - M18282 wrote:
>>>> From: Eugen Hristev <eugen.hristev@microchip.com>
>>>>
>>>> Add mmc capabilities for SDMMC0 for this board.
>>>> With this enabled, eMMC connected card is detected as:
>>>>
>>>> mmc0: new DDR MMC card at address 0001
>>>>
>>>> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
>>> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
>>>
>>> I am interested to have the some insights about the use of sd-uhs-*
>>> properties.
>>>
>>> Our IP can't deal with 1V8 by itself. It has a 1V8SEL signal which can
>>> be used as the logic control input of a mux. So even if the IP claims
>>> to support UHS modes, it depends on the board.
>>>
>>> Are the sd-uhs-* properties a way to deal with this? I tend to think no
>>> as sdhci_setup_host() will set the caps depending on the content of the
>>> capabilities register. Do we have to use the SDHCI_QUIRK_MISSING_CAPS
>>> quirk or sdhci-caps/sdhci-caps-mask?
>>
>> There is "no-1-8-v" which it looks like sdhci-of-at91.c already supports:
>>
>> sdhci_at91_probe() -> sdhci_get_of_property() -> sdhci_get_property()
>>
>> if (device_property_present(dev, "no-1-8-v"))
>> host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
>>
>
> Right, I forgot this property. Thanks.
>
> Eugen, do you see cases we can't cover with this property?
Hi,
For current requirements and driver support, this should be enough.
I noticed one thing regarding SD-Cards, if I add property sd-uhs-sdr104
the class 10 uhs1 cards are detected as SDR104 . Without this property
they are detected as DDR50. Any idea why the difference ? The controller
does not claim to have SDR104 support ? We should add it ?
Eugen
>
> Regards
>
> Ludovic
>
>>
>>>
>>> Regards
>>>
>>> Ludovic
>>>
>>>> ---
>>>> arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 1 +
>>>> 1 file changed, 1 insertion(+)
>>>>
>>>> diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
>>>> index 149e539..194b3a3 100644
>>>> --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
>>>> +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
>>>> @@ -54,6 +54,7 @@
>>>>
>>>> sdmmc0: sdio-host@a0000000 {
>>>> bus-width = <8>;
>>>> + mmc-ddr-3_3v;
>>>> pinctrl-names = "default";
>>>> pinctrl-0 = <&pinctrl_sdmmc0_default>;
>>>> status = "okay";
>>>> --
>>>> 2.7.4
>>>>
>>>
>>
>
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next prev parent reply other threads:[~2019-08-12 15:38 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-08 8:35 [PATCH 1/2] mmc: sdhci-of-at91: add quirk for broken HS200 Eugen.Hristev
2019-08-08 8:35 ` [PATCH 2/2] ARM: dts: at91: sama5d27_som1_ek: add mmc capabilities for SDMMC0 Eugen.Hristev
2019-08-08 12:42 ` Ludovic Desroches
2019-08-08 12:57 ` Adrian Hunter
2019-08-09 6:23 ` Ludovic Desroches
2019-08-12 15:38 ` Eugen.Hristev [this message]
2019-08-13 6:53 ` Ludovic Desroches
2019-10-03 10:24 ` Eugen.Hristev
2019-10-03 19:42 ` Alexandre Belloni
2019-08-08 12:42 ` [PATCH 1/2] mmc: sdhci-of-at91: add quirk for broken HS200 Ludovic Desroches
2019-08-08 13:00 ` Adrian Hunter
2019-08-08 15:23 ` Ulf Hansson
2019-08-09 8:08 ` Ludovic Desroches
2019-08-22 12:12 ` Ulf Hansson
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