From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 234DEC48BDF for ; Tue, 15 Jun 2021 16:59:31 +0000 (UTC) Received: from bombadil.infradead.org (unknown [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DFAF561625 for ; Tue, 15 Jun 2021 16:59:30 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DFAF561625 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:Cc:To:Subject:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=kdk+J/E/bYZxQKA/JDPWPA3QsSGqW4gY5TkEuTDY628=; b=02ebL0kjnhD2WcAgjVDlwYlI1G i3U/tI2wsMUdsuZCDPEbUIyRoCr7gkFr5+DC24a5sDMrwOjdDXosr9qtU5lIX/1esnhZTHGeqp6W4 XQ0lrma95JyR26IpcuVSmVMJVwu0JUwRJWQtMkDzAHsHdokeMhqo86LeNLJOnwD706U+n5WIiUA+K tbO3UJugKDlSjykHFXNaAbT1tm/NxdoEexNbNfN2zYmKOtwdUFlbcTZQ4mVhzpcTs7VccCmP4nvWH Ce1sPoSQayBqrJ3Wzvac03bd34BnoPoHNcO8aOQhxsHEfffFIl/HuEulK4siJ1pI9Kbhndi9Moh4z AM57AONg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ltCIW-001VTs-10; Tue, 15 Jun 2021 16:52:23 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ltA0E-000ZUb-B1 for linux-arm-kernel@lists.infradead.org; Tue, 15 Jun 2021 14:25:20 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4E12212FC; Tue, 15 Jun 2021 07:25:14 -0700 (PDT) Received: from [192.168.0.110] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CD51A3F719; Tue, 15 Jun 2021 07:25:12 -0700 (PDT) Subject: Re: [PATCH v4 4/9] KVM: arm64: vgic: Let an interrupt controller advertise lack of HW deactivation To: Marc Zyngier , linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu Cc: James Morse , Suzuki K Poulose , Eric Auger , Hector Martin , Mark Rutland , Zenghui Yu , kernel-team@android.com References: <20210601104005.81332-1-maz@kernel.org> <20210601104005.81332-5-maz@kernel.org> From: Alexandru Elisei Message-ID: Date: Tue, 15 Jun 2021 15:26:02 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: <20210601104005.81332-5-maz@kernel.org> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210615_072518_580094_F16B818B X-CRM114-Status: GOOD ( 29.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Marc, On 6/1/21 11:40 AM, Marc Zyngier wrote: > The vGIC, as architected by ARM, allows a virtual interrupt to > trigger the deactivation of a physical interrupt. This allows > the following interrupt to be delivered without requiring an exit. > > However, some implementations have choosen not to implement this, > meaning that we will need some unsavoury workarounds to deal with this. > > On detecting such a case, taint the kernel and spit a nastygram. > We'll deal with this in later patches. > > Signed-off-by: Marc Zyngier > --- > arch/arm64/kvm/vgic/vgic-init.c | 10 ++++++++++ > include/kvm/arm_vgic.h | 3 +++ > include/linux/irqchip/arm-vgic-info.h | 2 ++ > 3 files changed, 15 insertions(+) > > diff --git a/arch/arm64/kvm/vgic/vgic-init.c b/arch/arm64/kvm/vgic/vgic-init.c > index 6752d084934d..340c51d87677 100644 > --- a/arch/arm64/kvm/vgic/vgic-init.c > +++ b/arch/arm64/kvm/vgic/vgic-init.c > @@ -532,6 +532,16 @@ int kvm_vgic_hyp_init(void) > return -ENXIO; > } > > + /* > + * If we get one of these oddball non-GICs, taint the kernel, > + * as we have no idea of how they *really* behave. > + */ > + if (gic_kvm_info->no_hw_deactivation) { > + kvm_info("Non-architectural vgic, tainting kernel\n"); > + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK); I'm trying to figure out what are the effects of tainting the kernel, besides those nasty messages. In Documentation/admin-guide/tainted-kernels.rst, I found this bit: [..] the information is mainly of interest once someone wants to investigate some problem, as its real cause might be the event that got the kernel tainted. That's why bug reports from tainted kernels will often be ignored by developers, hence try to reproduce problems with an untainted kernel. The lack of HW deactivation affects only KVM, I was wondering if we could taint the kernel the first time a VM created. If the above doc is to go by, someone who is running Linux on an M1, but not using KVM, might stand a better chance to get support when something goes wrong in that case. What do you think? Thanks, Alex > + kvm_vgic_global_state.no_hw_deactivation = true; > + } > + > switch (gic_kvm_info->type) { > case GIC_V2: > ret = vgic_v2_probe(gic_kvm_info); > diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h > index ec621180ef09..e45b26e8d479 100644 > --- a/include/kvm/arm_vgic.h > +++ b/include/kvm/arm_vgic.h > @@ -72,6 +72,9 @@ struct vgic_global { > bool has_gicv4; > bool has_gicv4_1; > > + /* Pseudo GICv3 from outer space */ > + bool no_hw_deactivation; > + > /* GIC system register CPU interface */ > struct static_key_false gicv3_cpuif; > > diff --git a/include/linux/irqchip/arm-vgic-info.h b/include/linux/irqchip/arm-vgic-info.h > index 7c0d08ebb82c..a75b2c7de69d 100644 > --- a/include/linux/irqchip/arm-vgic-info.h > +++ b/include/linux/irqchip/arm-vgic-info.h > @@ -32,6 +32,8 @@ struct gic_kvm_info { > bool has_v4; > /* rvpeid support */ > bool has_v4_1; > + /* Deactivation impared, subpar stuff */ > + bool no_hw_deactivation; > }; > > #ifdef CONFIG_KVM _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel