From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"krzysztof.kozlowski+dt@linaro.org"
<krzysztof.kozlowski+dt@linaro.org>,
"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>,
"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>
Cc: "airlied@linux.ie" <airlied@linux.ie>,
"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
"angelogioacchino.delregno@collabora.com"
<angelogioacchino.delregno@collabora.com>,
"Jason-JH Lin (林睿祥)" <Jason-JH.Lin@mediatek.com>,
"Nancy Lin (林欣螢)" <Nancy.Lin@mediatek.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
"linux-mediatek@lists.infradead.org"
<linux-mediatek@lists.infradead.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Project_Global_Chrome_Upstream_Group
<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: Re: [PATCH v2 1/3] dt-bindings: mediatek: add vdosys1 RDMA definition for mt8195
Date: Mon, 9 May 2022 16:45:46 +0800 [thread overview]
Message-ID: <fbbbc7e6a951bdde648ddd896f1fa163dafa16f1.camel@mediatek.com> (raw)
In-Reply-To: <a5c9e7ad-c4b5-e757-cd6d-f79de47d1ff3@linaro.org>
On Mon, 2022-05-09 at 15:31 +0800, Krzysztof Kozlowski wrote:
> On 09/05/2022 06:43, Rex-BC Chen wrote:
> > From: "Nancy.Lin" <nancy.lin@mediatek.com>
> >
> > Add vdosys1 RDMA definition.
> >
> > Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
> > Reviewed-by: AngeloGioacchino Del Regno <
> > angelogioacchino.delregno@collabora.com>
> > ---
> > .../display/mediatek/mediatek,mdp-rdma.yaml | 94
> > +++++++++++++++++++
> > 1 file changed, 94 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-
> > rdma.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-
> > rdma.yaml
> > b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-
> > rdma.yaml
> > new file mode 100644
> > index 000000000000..ca31accb0a95
> > --- /dev/null
> > +++
> > b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-
> > rdma.yaml
> > @@ -0,0 +1,94 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id:
> > https://urldefense.com/v3/__http://devicetree.org/schemas/display/mediatek/mediatek,mdp-rdma.yaml*__;Iw!!CTRNKA9wMg0ARbw!x6pqRSLbN1fx6j57PKXCTTp8n7bulgpLzXS8uUh5vAIxkRKD8K6EqOopnFrXvT54LQXmIEDFFvPQzC4ldr1TddEeTw$
> >
> > +$schema:
> > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!x6pqRSLbN1fx6j57PKXCTTp8n7bulgpLzXS8uUh5vAIxkRKD8K6EqOopnFrXvT54LQXmIEDFFvPQzC4ldr3y-9sW3w$
> >
> > +
> > +title: MediaTek MDP RDMA
> > +
> > +maintainers:
> > + - Chun-Kuang Hu <chunkuang.hu@kernel.org>
> > + - Philipp Zabel <p.zabel@pengutronix.de>
> > +
> > +description:
> > + The MediaTek MDP RDMA stands for Read Direct Memory Access.
> > + It provides real time data to the back-end panel driver, such as
> > DSI,
> > + DPI and DP_INTF.
> > + It contains one line buffer to store the sufficient pixel data.
> > + RDMA device node must be siblings to the central MMSYS_CONFIG
> > node.
> > + For a description of the MMSYS_CONFIG binding, see
> > + Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.ya
> > ml for details.
> > +
> > +properties:
> > + compatible:
> > + oneOf:
>
> oneOf is not needed
>
> > + - items:
>
> items not needed, you have only one item.
>
Hello Krzysztof,
Thanks for your review.
ok, we will drop them.
> > + - const: mediatek,mt8195-vdo1-rdma
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > + power-domains:
> > + description: A phandle and PM domain specifier as defined by
> > bindings of
> > + the power controller specified by phandle. See
> > + Documentation/devicetree/bindings/power/power-domain.yaml
> > for details.
>
> Skip description, it's obvious. Instead maxItems.
>
ok, we will fix it.
> > +
> > + clocks:
> > + items:
> > + - description: RDMA Clock
> > +
> > + iommus:
> > + description:
> > + This property should point to the respective IOMMU block
> > with master port as argument,
> > + see
> > Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for
> > details.
>
> Skip description, it's obvious. Instead maxItems.
>
ok, we will fix it.
> > +
> > + mediatek,gce-client-reg:
> > + description:
> > + The register of display function block to be set by gce.
> > There are 4 arguments,
> > + such as gce node, subsys id, offset and register size. The
> > subsys id that is
> > + mapping to the register of display function blocks is
> > defined in the gce header
> > + include/include/dt-bindings/gce/<chip>-gce.h of each chips.
>
> Double "include" in the path.
ok, we will fix it.
>
> > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > + items:
> > + items:
> > + - description: phandle of GCE
> > + - description: GCE subsys id
> > + - description: register offset
> > + - description: register size
> > + maxItems: 1
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - power-domains
> > + - clocks
> > + - iommus
> > + - mediatek,gce-client-reg
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > + #include <dt-bindings/clock/mt8195-clk.h>
> > + #include <dt-bindings/power/mt8195-power.h>
> > + #include <dt-bindings/gce/mt8195-gce.h>
> > + #include <dt-bindings/memory/mt8195-memory-port.h>
> > +
> > + soc {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + vdo1_rdma0: mdp-rdma@1c104000 {
>
> Generic node name. dma-controller (if it does not conflict with
> dma-common.yaml schema)?
We don't understand what dma-controller you are referring to? Can you
help explain more? Thanks!
BRs,
Rex
>
> > + compatible = "mediatek,mt8195-vdo1-rdma";
> > + reg = <0 0x1c104000 0 0x1000>;
> > + interrupts = <GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH 0>;
> > + clocks = <&vdosys1 CLK_VDO1_MDP_RDMA0>;
> > + power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
> > + iommus = <&iommu_vdo M4U_PORT_L2_MDP_RDMA0>;
> > + mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX
> > 0x4000 0x1000>;
> > + };
> > + };
>
>
> Best regards,
> Krzysztof
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next prev parent reply other threads:[~2022-05-09 8:57 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-09 4:42 [PATCH v2 0/3] MediaTek MT8195 display binding Rex-BC Chen
2022-05-09 4:43 ` [PATCH v2 1/3] dt-bindings: mediatek: add vdosys1 RDMA definition for mt8195 Rex-BC Chen
2022-05-09 7:31 ` Krzysztof Kozlowski
2022-05-09 8:45 ` Rex-BC Chen [this message]
2022-05-10 10:28 ` Krzysztof Kozlowski
2022-05-10 10:37 ` Chen-Yu Tsai
2022-05-10 10:57 ` Krzysztof Kozlowski
2022-05-11 2:26 ` Rex-BC Chen
2022-05-11 7:21 ` Krzysztof Kozlowski
2022-05-09 12:20 ` Rob Herring
2022-05-30 7:06 ` Pavel Machek
2022-06-02 3:53 ` Rex-BC Chen
2022-05-09 4:43 ` [PATCH v2 2/3] dt-bindings: reset: mt8195: add vdosys1 reset control bit Rex-BC Chen
2022-05-09 4:43 ` [PATCH v2 3/3] dt-bindings: mediatek: add ethdr definition for mt8195 Rex-BC Chen
2022-05-09 7:35 ` Krzysztof Kozlowski
2022-05-09 8:54 ` Rex-BC Chen
2022-05-09 10:44 ` Krzysztof Kozlowski
2022-05-09 10:50 ` AngeloGioacchino Del Regno
2022-05-10 1:46 ` Rex-BC Chen
2022-05-10 11:19 ` Krzysztof Kozlowski
2022-05-11 2:29 ` Rex-BC Chen
2022-05-09 12:20 ` Rob Herring
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