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Thu, 5 Dec 2019 18:17:41 -0500 (EST) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.1.7-612-g13027cc-fmstable-20191203v1 Mime-Version: 1.0 Message-Id: In-Reply-To: References: <3da2492c244962c27b21aad87bfa6bf74f568f1d.1575376664.git-series.andrew@aj.id.au> <40d554c0-de62-4d45-bbcc-dd3a3aa12a65@www.fastmail.com> Date: Fri, 06 Dec 2019 09:49:04 +1030 From: "Andrew Jeffery" To: "Rob Herring" Subject: =?UTF-8?Q?Re:_[PATCH_1/3]_dt-bindings:_ipmi:_aspeed:_Introduce_a_v2_bind?= =?UTF-8?Q?ing_for_KCS?= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191205_151747_482209_60B129BE X-CRM114-Status: GOOD ( 18.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Corey Minyard , Arnd Bergmann , Greg Kroah-Hartman , "linux-kernel@vger.kernel.org" , linux-aspeed@lists.ozlabs.org, Joel Stanley , openipmi-developer@lists.sourceforge.net, "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 6 Dec 2019, at 04:20, Rob Herring wrote: > On Wed, Dec 4, 2019 at 11:12 PM Andrew Jeffery wrote: > > > > > > > > On Wed, 4 Dec 2019, at 01:01, Rob Herring wrote: > > > On Tue, Dec 3, 2019 at 6:36 AM Andrew Jeffery wrote: > > > > > > > > The v2 binding utilises reg and renames some of the v1 properties. > > > > > > > > Signed-off-by: Andrew Jeffery > > > > --- > > > > Documentation/devicetree/bindings/ipmi/aspeed-kcs-bmc.txt | 20 +++++--- > > > > 1 file changed, 14 insertions(+), 6 deletions(-) > > > > > > > > diff --git a/Documentation/devicetree/bindings/ipmi/aspeed-kcs-bmc.txt b/Documentation/devicetree/bindings/ipmi/aspeed-kcs-bmc.txt > > > > index d98a9bf45d6c..76b180ebbde4 100644 > > > > --- a/Documentation/devicetree/bindings/ipmi/aspeed-kcs-bmc.txt > > > > +++ b/Documentation/devicetree/bindings/ipmi/aspeed-kcs-bmc.txt > > > > @@ -1,9 +1,10 @@ > > > > -* Aspeed KCS (Keyboard Controller Style) IPMI interface > > > > +# Aspeed KCS (Keyboard Controller Style) IPMI interface > > > > > > > > The Aspeed SOCs (AST2400 and AST2500) are commonly used as BMCs > > > > (Baseboard Management Controllers) and the KCS interface can be > > > > used to perform in-band IPMI communication with their host. > > > > > > > > +## v1 > > > > Required properties: > > > > - compatible : should be one of > > > > "aspeed,ast2400-kcs-bmc" > > > > @@ -12,14 +13,21 @@ Required properties: > > > > - kcs_chan : The LPC channel number in the controller > > > > - kcs_addr : The host CPU IO map address > > > > > > > > +## v2 > > > > +Required properties: > > > > +- compatible : should be one of > > > > + "aspeed,ast2400-kcs-bmc-v2" > > > > + "aspeed,ast2500-kcs-bmc-v2" > > > > +- reg : The address and size of the IDR, ODR and STR registers > > > > +- interrupts : interrupt generated by the controller > > > > +- slave-reg : The host CPU IO map address > > > > > > aspeed,slave-reg > > > > I don't agree, as it's not an aspeed-specific behaviour. This property > > controls where the device appears in the host's LPC IO address space, > > which is a common problem for any LPC IO device exposed by the BMC > > to the host. > > Then document it as such. Common properties go into common binding documents. Fair call. > > > > > Example: > > > > > > > > - kcs3: kcs3@0 { > > > > - compatible = "aspeed,ast2500-kcs-bmc"; > > > > - reg = <0x0 0x80>; > > > > + kcs3: kcs@24 { > > > > + compatible = "aspeed,ast2500-kcs-bmc-v2"; > > > > + reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>; > > > > > > What are the other registers in this address space? I'm not so sure > > > this is an improvement if you end up with a bunch of nodes with single > > > registers. > > > > Put into practice the bindings give the following patch: on the AST2500: > > Okay, that's an unfortunate interleaving, but seems fine. "Unfortunate" is a good description for the entire register layout of the LPC slave controller. I'll send a v2. Thanks, Andrew _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel