From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0346DC433E0 for ; Thu, 21 May 2020 14:03:45 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BE972206F6 for ; Thu, 21 May 2020 14:03:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="KD6avi4U" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BE972206F6 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date: In-reply-to:Subject:To:From:References:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=Yh/O5aMVaGHN/jEFBU7zXTKBmrUOW+txDY6YFnmNa0E=; b=KD6avi4UzDmcARC40KkJoyuobF UDCtiW1k41uOuLKjjTcRWeUldHGB15Wcg75db7bJqe22qIL1nm9D0pP+gUn90OGtwGH2njY1SbXOp awygfWATOTESGizDMGbk4IuSiq5p3Exq5Zv67R8ZbTYKDBSxKfoje+FKLrIG8V7UDGUskEd1phh90 fGybbmIuBiO2e8iRhvaBnDLqh+u9YRIoxVBi9EwuNPMYGzjGmjwi1AyH3o1BcVx+AqSBPlkW9/qFh d22jLRik8ZGwHeLmiApSfYG/yba742+sfRpDRwugX5GMOx0aloHasx83foB6wSJwpH1OdqEKZJ/jl z8XNBBoA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jblnU-00082O-Dv; Thu, 21 May 2020 14:03:44 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jblnS-00081S-AR for linux-arm-kernel@lists.infradead.org; Thu, 21 May 2020 14:03:43 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 935A4D6E; Thu, 21 May 2020 07:03:37 -0700 (PDT) Received: from e113632-lin (e113632-lin.cambridge.arm.com [10.1.194.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3F97D3F305; Thu, 21 May 2020 07:03:36 -0700 (PDT) References: <20200519161755.209565-1-maz@kernel.org> <20200519161755.209565-4-maz@kernel.org> User-agent: mu4e 0.9.17; emacs 26.3 From: Valentin Schneider To: Marc Zyngier Subject: Re: [PATCH 03/11] arm64: Allow IPIs to be handled as normal interrupts In-reply-to: <20200519161755.209565-4-maz@kernel.org> Date: Thu, 21 May 2020 15:03:29 +0100 Message-ID: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200521_070342_402890_FAA21A1B X-CRM114-Status: GOOD ( 18.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sumit Garg , kernel-team@android.com, Russell King , Jason Cooper , Catalin Marinas , linux-kernel@vger.kernel.org, Thomas Gleixner , Will Deacon , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 19/05/20 17:17, Marc Zyngier wrote: > In order to deal with IPIs as normal interrupts, let's add > a new way to register them with the architecture code. > > set_smp_ipi_range() takes a range of interrupts, and allows > the arch code to request them as if the were normal interrupts. ^^^ s/the/they/ > A standard handler is then called by the core IRQ code to deal > with the IPI. > > This means that we don't need to call irq_enter/irq_exit, and > that we don't need to deal with set_irq_regs either. So let's > move the dispatcher into its own function, and leave handle_IPI() > as a compatibility function. > > On the sending side, let's make use of ipi_send_mask, which > already exists for this purpose. > > Signed-off-by: Marc Zyngier > --- > arch/arm64/Kconfig | 1 + > arch/arm64/include/asm/smp.h | 5 ++ > arch/arm64/kernel/smp.c | 92 +++++++++++++++++++++++++++++++----- > 3 files changed, 86 insertions(+), 12 deletions(-) > > diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c > index 061f60fe452f..93ba0025e7b9 100644 > --- a/arch/arm64/kernel/smp.c > +++ b/arch/arm64/kernel/smp.c > @@ -247,6 +254,8 @@ asmlinkage notrace void secondary_start_kernel(void) > */ > notify_cpu_starting(cpu); > > + ipi_setup(cpu); > + > store_cpu_topology(cpu); > numa_add_cpu(cpu); > > @@ -374,6 +383,8 @@ void cpu_die(void) > > local_daif_mask(); > > + ipi_teardown(cpu); > + Would it make sense to move it up to say __cpu_disable()? I'm thinking it would make sense to bunch this up with the toggling of the cpu_online_mask bit, and FWIW it'd match with the comment atop the cpuhp callsite. Once the CPU is set as offline, all it has left to do is to go die in do_idle(), so AFAICT we can do that IPI teardown anywhere inbetween. > /* Tell __cpu_die() that this CPU is now safe to dispose of */ > (void)cpu_report_death(); > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel