From: Taniya Das <tdas@codeaurora.org>
To: Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>
Cc: Andy Gross <andy.gross@linaro.org>,
David Brown <david.brown@linaro.org>,
Rajendra Nayak <rnayak@codeaurora.org>,
linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 3/3] clk: qcom: rcg: update the DFS macro for RCG
Date: Fri, 10 May 2019 08:28:39 +0530 [thread overview]
Message-ID: <07bcd2df-a786-ea52-8566-70f484248952@codeaurora.org> (raw)
In-Reply-To: <155742286525.14659.18081373668341127486@swboyd.mtv.corp.google.com>
Hello Stephen,
Thanks for the review.
On 5/9/2019 10:57 PM, Stephen Boyd wrote:
> Quoting Taniya Das (2019-05-08 11:24:55)
>> Update the init data name for each of the dynamic frequency switch
>> controlled clock associated with the RCG clock name, so that it can be
>> generated as per the hardware plan. Thus update the macro accordingly.
>>
>> Signed-off-by: Taniya Das <tdas@codeaurora.org>
>
> This patch doesn't make any sense to me.
>
>> ---
>> drivers/clk/qcom/clk-rcg.h | 2 +-
>> drivers/clk/qcom/gcc-sdm845.c | 96 +++++++++++++++++++++----------------------
>> 2 files changed, 49 insertions(+), 49 deletions(-)
>>
>> diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers/clk/qcom/clk-rcg.h
>> index 5562f38..e40e8f8 100644
>> --- a/drivers/clk/qcom/clk-rcg.h
>> +++ b/drivers/clk/qcom/clk-rcg.h
>> @@ -171,7 +171,7 @@ struct clk_rcg_dfs_data {
>> };
>>
>> #define DEFINE_RCG_DFS(r) \
>> - { .rcg = &r##_src, .init = &r##_init }
>> + { .rcg = &r, .init = &r##_init }
>
> Why do we need to rename the init data?
>
We want to manage the init data as the clock source name, so that we
could manage to auto generate our code. So that we do not have to
re-name the clock init data manually if the DFS source names gets
updated at any point of time.
>>
>> extern int qcom_cc_register_rcg_dfs(struct regmap *regmap,
>> const struct clk_rcg_dfs_data *rcgs,
>> diff --git a/drivers/clk/qcom/gcc-sdm845.c b/drivers/clk/qcom/gcc-sdm845.c
>> index 7131dcf..a76178b 100644
>> --- a/drivers/clk/qcom/gcc-sdm845.c
>> +++ b/drivers/clk/qcom/gcc-sdm845.c
>> @@ -408,7 +408,7 @@ enum {
>> { }
>> };
>>
>> -static struct clk_init_data gcc_qupv3_wrap0_s0_clk_init = {
>> +static struct clk_init_data gcc_qupv3_wrap0_s0_clk_src_init = {
>> .name = "gcc_qupv3_wrap0_s0_clk_src",
>> .parent_names = gcc_parent_names_0,
>> .num_parents = 4,
>> @@ -3577,22 +3577,22 @@ enum {
>> MODULE_DEVICE_TABLE(of, gcc_sdm845_match_table);
>>
>> static const struct clk_rcg_dfs_data gcc_dfs_clocks[] = {
>> - DEFINE_RCG_DFS(gcc_qupv3_wrap0_s0_clk),
>> + DEFINE_RCG_DFS(gcc_qupv3_wrap0_s0_clk_src),
>
> I've trimmed the above to try and see what's changed but it doesn't make
> sense still.
>
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation.
--
next prev parent reply other threads:[~2019-05-10 2:58 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-08 18:24 [PATCH v1 0/3] clk: qcom: Misc updates for Root Clock Generators Taniya Das
2019-05-08 18:24 ` [PATCH v1 1/3] clk: qcom: rcg: Return failure for RCG update Taniya Das
2019-07-15 22:52 ` Stephen Boyd
2019-05-08 18:24 ` [PATCH v1 2/3] clk: qcom: rcg2: Add support for hardware control mode Taniya Das
2019-07-15 22:52 ` Stephen Boyd
2019-07-16 4:19 ` Taniya Das
2019-07-16 23:18 ` Stephen Boyd
2019-07-30 10:50 ` Taniya Das
2019-07-30 15:38 ` Stephen Boyd
2019-05-08 18:24 ` [PATCH v1 3/3] clk: qcom: rcg: update the DFS macro for RCG Taniya Das
2019-05-09 17:27 ` Stephen Boyd
2019-05-10 2:58 ` Taniya Das [this message]
2019-05-10 17:54 ` Stephen Boyd
2019-05-13 3:44 ` Taniya Das
2019-07-15 22:44 ` Stephen Boyd
2019-07-16 4:22 ` Taniya Das
2019-07-16 23:22 ` Stephen Boyd
2019-07-30 10:51 ` Taniya Das
2019-07-30 15:40 ` Stephen Boyd
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