From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90C1FC433EF for ; Tue, 14 Dec 2021 17:15:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236370AbhLNRPf (ORCPT ); Tue, 14 Dec 2021 12:15:35 -0500 Received: from alexa-out-sd-01.qualcomm.com ([199.106.114.38]:11262 "EHLO alexa-out-sd-01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233758AbhLNRPf (ORCPT ); Tue, 14 Dec 2021 12:15:35 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1639502135; x=1671038135; h=subject:to:cc:references:from:message-id:date: mime-version:in-reply-to:content-transfer-encoding; bh=V3ZUoQpiArCEzg9uDWxQEPmkSZnIQmzZmlxrBFeYcTE=; b=CKKRAcrUbaR2Y0WcVBE4SgetYhnl7EgXY7nWzRYxIcAiX3AtDWabjEE1 1NxxeO8796zFFmjbgvMox3lB8rZExolDbfN5rgsY0anvwzCq/JfC7Xdgp IctMbcSB6Yjyo1tBejurLd1pEc9yUcV7n9ZlIhvOXbxoH2Pn3AqF3IupL c=; Received: from unknown (HELO ironmsg02-sd.qualcomm.com) ([10.53.140.142]) by alexa-out-sd-01.qualcomm.com with ESMTP; 14 Dec 2021 09:15:34 -0800 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg02-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Dec 2021 09:15:33 -0800 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Tue, 14 Dec 2021 09:15:33 -0800 Received: from [10.216.27.180] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Tue, 14 Dec 2021 09:15:26 -0800 Subject: Re: [PATCH v5 3/5] pinctrl: qcom: Extract chip specific LPASS LPI code To: Andy Shevchenko CC: Andy Gross , Bjorn Andersson , Liam Girdwood , Mark Brown , Rob Herring , , Banajit Goswami , "Jaroslav Kysela" , Takashi Iwai , Srinivas Kandagatla , , , ALSA Development Mailing List , devicetree , Linux Kernel Mailing List , Stephen Boyd , , Linus Walleij , "open list:GPIO SUBSYSTEM" , Venkata Prasad Potturu References: <1638891339-21806-1-git-send-email-quic_srivasam@quicinc.com> <1638891339-21806-4-git-send-email-quic_srivasam@quicinc.com> From: Srinivasa Rao Mandadapu Organization: Qualcomm Message-ID: <0f6621e5-f014-27c9-be8b-6c32ab994304@quicinc.com> Date: Tue, 14 Dec 2021 22:45:23 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 12/8/2021 11:58 AM, Andy Shevchenko wrote: Thanks for your time Andy!!! > On Wed, Dec 8, 2021 at 2:39 AM Srinivasa Rao Mandadapu > wrote: >> Extract the chip specific SM8250 data from the LPASS LPI pinctrl driver >> to allow reusing the common code in the addition of subsequent >> platforms. > ... > >> @@ -661,8 +454,10 @@ static int lpi_pinctrl_probe(struct platform_device *pdev) >> >> return ret; >> } >> +EXPORT_SYMBOL(lpi_pinctrl_probe); >> + > Stray change. > > ... okay. will remove it. > >> +#ifndef __PINCTRL_LPASS_LPI_H__ >> +#define __PINCTRL_LPASS_LPI_H__ > Missed headers. > At least bits.h. > > ... Okay. will add. >> +#define NO_SLEW -1 > Naming sucks for the header. > > LPI_NO_SLEW ? Actually it's already mainline code. Just these patches are rearrangement of old code. still do you suggest to change? > > ... > >> +struct lpi_pingroup { >> + const char *name; >> + const unsigned int *pins; >> + unsigned int npins; >> + unsigned int pin; >> + /* Bit offset in slew register for SoundWire pins only */ >> + int slew_offset; >> + unsigned int *funcs; >> + unsigned int nfuncs; >> +}; > Are you going to convert this to use struct group_desc? > > ... > >> + LPI_MUX__, > Strange naming. Besides, if it is the terminator, drop the comma. okay will remove comma. but name is from existing code. >