From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A0B7C3A5A8 for ; Mon, 2 Sep 2019 08:21:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 71FB92173E for ; Mon, 2 Sep 2019 08:21:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1567412466; bh=BbZKUhNFpw8vqDlmoSyZ7Qmvj6Kb+53Fk7hn/ROwkJo=; h=Subject:To:Cc:References:From:Date:In-Reply-To:List-ID:From; b=iksMp+0DzBotLg+fX7WqKCfgbR3Wr7cld3jyos8et5+Mhyldfm4U1TMG9VGHygcdN +TkgAl9No4FwSFZWOmH49cwcrSxbp+ltwQevctYEXgzwBJjeetmel1fhbYlxyJtlaz 3UP3lSPjZ/aHS9zHbua4lixeBGyt5iCxaw+zrv0I= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729751AbfIBIVG (ORCPT ); Mon, 2 Sep 2019 04:21:06 -0400 Received: from foss.arm.com ([217.140.110.172]:50152 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729408AbfIBIVF (ORCPT ); Mon, 2 Sep 2019 04:21:05 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A799028; Mon, 2 Sep 2019 01:21:04 -0700 (PDT) Received: from [10.1.197.61] (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3032B3F71A; Mon, 2 Sep 2019 01:21:03 -0700 (PDT) Subject: Re: [PATCH RFC 03/14] drivers: irqchip: add PDC irqdomain for wakeup capable GPIOs To: Lina Iyer Cc: swboyd@chromium.org, evgreen@chromium.org, linus.walleij@linaro.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, mkshah@codeaurora.org, linux-gpio@vger.kernel.org, rnayak@codeaurora.org References: <20190829181203.2660-1-ilina@codeaurora.org> <20190829181203.2660-4-ilina@codeaurora.org> <20190830155853.GA5224@codeaurora.org> From: Marc Zyngier Organization: Approximate Message-ID: <11d14b08-27ae-d25a-6056-55c1cfbd89b1@kernel.org> Date: Mon, 2 Sep 2019 09:21:02 +0100 User-Agent: Mozilla/5.0 (X11; Linux aarch64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <20190830155853.GA5224@codeaurora.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 30/08/2019 16:58, Lina Iyer wrote: > On Fri, Aug 30 2019 at 08:50 -0600, Marc Zyngier wrote: >> [Please use my kernel.org address in the future. The days of this >> arm.com address are numbered...] >> > Sure, will update and repost. > >> On 29/08/2019 19:11, Lina Iyer wrote: >>> Introduce a new domain for wakeup capable GPIOs. The domain can be >>> requested using the bus token DOMAIN_BUS_WAKEUP. In the following >>> patches, we will specify PDC as the wakeup-parent for the TLMM GPIO >>> irqchip. Requesting a wakeup GPIO will setup the GPIO and the >>> corresponding PDC interrupt as its parent. >>> >>> Co-developed-by: Stephen Boyd >>> Signed-off-by: Lina Iyer >>> --- >>> drivers/irqchip/qcom-pdc.c | 104 ++++++++++++++++++++++++++++++++--- >>> include/linux/soc/qcom/irq.h | 34 ++++++++++++ >>> 2 files changed, 129 insertions(+), 9 deletions(-) >>> create mode 100644 include/linux/soc/qcom/irq.h >>> [...] >>> diff --git a/include/linux/soc/qcom/irq.h b/include/linux/soc/qcom/irq.h >>> new file mode 100644 >>> index 000000000000..73239917dc38 >>> --- /dev/null >>> +++ b/include/linux/soc/qcom/irq.h >>> @@ -0,0 +1,34 @@ >>> +/* SPDX-License-Identifier: GPL-2.0-only */ >>> + >>> +#ifndef __QCOM_IRQ_H >>> +#define __QCOM_IRQ_H >>> + >>> +#include >>> + >>> +#define GPIO_NO_WAKE_IRQ ~0U >>> + >>> +/** >>> + * QCOM specific IRQ domain flags that distinguishes the handling of wakeup >>> + * capable interrupts by different interrupt controllers. >>> + * >>> + * IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP: Line must be masked at TLMM and the >>> + * interrupt configuration is done at PDC >>> + * IRQ_DOMAIN_FLAG_QCOM_MPM_WAKEUP: Interrupt configuration is handled at TLMM >>> + */ >>> +#define IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP (1 << 17) >>> +#define IRQ_DOMAIN_FLAG_QCOM_MPM_WAKEUP (1 << 18) >> >> Any reason why you're starting at bit 17? The available range in from >> bit 16... But overall, it would be better if you expressed it as: >> >> #define IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP (IRQ_DOMAIN_FLAG_NONCORE << 0) >> #define IRQ_DOMAIN_FLAG_QCOM_MPM_WAKEUP (IRQ_DOMAIN_FLAG_NONCORE << 1) >> > Okay. > >>> + >>> +/** >>> + * irq_domain_qcom_handle_wakeup: Return if the domain handles interrupt >>> + * configuration >>> + * @parent: irq domain >>> + * >>> + * This QCOM specific irq domain call returns if the interrupt controller >>> + * requires the interrupt be masked at the child interrupt controller. >>> + */ >>> +static inline bool irq_domain_qcom_handle_wakeup(struct irq_domain *parent) >>> +{ >>> + return (parent->flags & IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP); >>> +} >>> + >>> +#endif >>> >> >> But most of this file isn't used by this patch, so maybe it should be >> moved somewhere else... >> > Apart from creating the domain, this is not used here, but a separate > patch seemed excessive. Let me know if you have any suggestions. My personal preference would be to move it into the patch that actually makes use of this. M. -- Jazz is not dead, it just smells funny...