From: "Ruhl, Michael J" <michael.j.ruhl@intel.com>
To: Jonathan Marek <jonathan@marek.ca>,
"freedreno@lists.freedesktop.org"
<freedreno@lists.freedesktop.org>
Cc: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Jordan Crouse <jcrouse@codeaurora.org>,
Sharat Masetty <smasetty@codeaurora.org>,
"open list:DRM DRIVER FOR MSM ADRENO GPU"
<linux-arm-msm@vger.kernel.org>,
"open list:DRM DRIVER FOR MSM ADRENO GPU"
<dri-devel@lists.freedesktop.org>,
"open list" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH v2 6/9] drm/msm/a6xx: A640/A650 GMU firmware path
Date: Thu, 23 Apr 2020 17:36:31 +0000 [thread overview]
Message-ID: <14063C7AD467DE4B82DEDB5C278E8663010212DE20@FMSMSX108.amr.corp.intel.com> (raw)
In-Reply-To: <20200421234127.27965-7-jonathan@marek.ca>
>-----Original Message-----
>From: Jonathan Marek <jonathan@marek.ca>
>Sent: Tuesday, April 21, 2020 7:41 PM
>To: freedreno@lists.freedesktop.org
>Cc: Rob Clark <robdclark@gmail.com>; Sean Paul <sean@poorly.run>; David
>Airlie <airlied@linux.ie>; Daniel Vetter <daniel@ffwll.ch>; Jordan Crouse
><jcrouse@codeaurora.org>; Sharat Masetty <smasetty@codeaurora.org>;
>Ruhl, Michael J <michael.j.ruhl@intel.com>; open list:DRM DRIVER FOR MSM
>ADRENO GPU <linux-arm-msm@vger.kernel.org>; open list:DRM DRIVER FOR
>MSM ADRENO GPU <dri-devel@lists.freedesktop.org>; open list <linux-
>kernel@vger.kernel.org>
>Subject: [PATCH v2 6/9] drm/msm/a6xx: A640/A650 GMU firmware path
>
>Newer GPUs have different GMU firmware path.
>
>Signed-off-by: Jonathan Marek <jonathan@marek.ca>
>---
> drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 135 +++++++++++++++++++-
>--
> drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 11 ++
> drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h | 6 +
> 3 files changed, 136 insertions(+), 16 deletions(-)
>
>diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
>b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
>index b22a69e2f4b0..4aef5fe985d6 100644
>--- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
>+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
>@@ -571,6 +571,8 @@ static void a6xx_gmu_power_config(struct a6xx_gmu
>*gmu)
> {
> /* Disable GMU WB/RB buffer */
> gmu_write(gmu, REG_A6XX_GMU_SYS_BUS_CONFIG, 0x1);
>+ gmu_write(gmu, REG_A6XX_GMU_ICACHE_CONFIG, 0x1);
>+ gmu_write(gmu, REG_A6XX_GMU_DCACHE_CONFIG, 0x1);
>
> gmu_write(gmu, REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL,
>0x9c40400);
>
>@@ -600,14 +602,91 @@ static void a6xx_gmu_power_config(struct
>a6xx_gmu *gmu)
> A6XX_GMU_RPMH_CTRL_GFX_VOTE_ENABLE);
> }
>
>+static int in_range(u32 addr, u32 start, u32 size)
>+{
>+ return addr >= start && addr < start + size;
>+}
Minor nit:
should this return a bool?
M
next prev parent reply other threads:[~2020-04-23 17:36 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20200421234127.27965-1-jonathan@marek.ca>
2020-04-21 23:41 ` [PATCH v2 1/9] drm/msm: add msm_gem_get_and_pin_iova_range Jonathan Marek
2020-04-21 23:41 ` [PATCH v2 2/9] drm/msm: add internal MSM_BO_MAP_PRIV flag Jonathan Marek
2020-04-23 15:25 ` [Freedreno] " Jordan Crouse
2020-04-21 23:41 ` [PATCH v2 3/9] drm/msm/a6xx: use msm_gem for GMU memory objects Jonathan Marek
2020-04-23 15:34 ` Jordan Crouse
2020-04-21 23:41 ` [PATCH v2 4/9] drm/msm/a6xx: add A640/A650 to gpulist Jonathan Marek
2020-04-23 15:38 ` Jordan Crouse
2020-04-21 23:41 ` [PATCH v2 5/9] drm/msm/a6xx: HFI v2 for A640 and A650 Jonathan Marek
2020-04-23 16:25 ` Jordan Crouse
2020-04-21 23:41 ` [PATCH v2 6/9] drm/msm/a6xx: A640/A650 GMU firmware path Jonathan Marek
2020-04-23 16:20 ` Jordan Crouse
2020-04-23 17:36 ` Ruhl, Michael J [this message]
2020-04-21 23:41 ` [PATCH v2 7/9] drm/msm/a6xx: update pdc/rscc GMU registers for A640/A650 Jonathan Marek
2020-04-23 15:53 ` Jordan Crouse
2020-04-21 23:41 ` [PATCH v2 8/9] drm/msm/a6xx: enable GMU log Jonathan Marek
2020-04-23 16:21 ` Jordan Crouse
2020-04-21 23:41 ` [PATCH v2 9/9] drm/msm/a6xx: update a6xx_hw_init for A640 and A650 Jonathan Marek
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