From: Archit Taneja <architt@codeaurora.org>
To: dri-devel@lists.freedesktop.org
Cc: robdclark@gmail.com, linux-arm-msm@vger.kernel.org,
hali@codeaurora.org, Archit Taneja <architt@codeaurora.org>
Subject: [PATCH 2/2] drm/msm/dsi: Report PHY errors only when they really occur
Date: Thu, 25 Jun 2015 11:29:24 +0530 [thread overview]
Message-ID: <1435211964-29170-2-git-send-email-architt@codeaurora.org> (raw)
In-Reply-To: <1435211964-29170-1-git-send-email-architt@codeaurora.org>
DSI PHY errors are falsely reported whenever a dsi error occurs. This is
because DSI_DLN0_PHY_ERR isn't only used as a status register, but also
used to mask PHY errors. Currently, we end up reading the mask bits too
and therefore always report errors.
Ignore the register mask bits and check for only the status/clear bits.
Signed-off-by: Archit Taneja <architt@codeaurora.org>
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 932efab..5bc9544 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -1260,7 +1260,11 @@ static void dsi_dln0_phy_err(struct msm_dsi_host *msm_host)
status = dsi_read(msm_host, REG_DSI_DLN0_PHY_ERR);
- if (status) {
+ if (status & (DSI_DLN0_PHY_ERR_DLN0_ERR_ESC |
+ DSI_DLN0_PHY_ERR_DLN0_ERR_SYNC_ESC |
+ DSI_DLN0_PHY_ERR_DLN0_ERR_CONTROL |
+ DSI_DLN0_PHY_ERR_DLN0_ERR_CONTENTION_LP0 |
+ DSI_DLN0_PHY_ERR_DLN0_ERR_CONTENTION_LP1)) {
dsi_write(msm_host, REG_DSI_DLN0_PHY_ERR, status);
msm_host->err_work_state |= DSI_ERR_STATE_DLN0_PHY;
}
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
prev parent reply other threads:[~2015-06-25 5:59 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-25 5:59 [PATCH 1/2] drm/msm/dsi: Update generated headers with DSI_DLN0_PHY_ERR bitfields Archit Taneja
2015-06-25 5:59 ` Archit Taneja [this message]
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