From: Shubhashree Dhar <dhar@codeaurora.org>
To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org,
freedreno@lists.freedesktop.org, devicetree@vger.kernel.org
Cc: Shubhashree Dhar <dhar@codeaurora.org>,
linux-kernel@vger.kernel.org, robdclark@gmail.com,
seanpaul@chromium.org, hoegsberg@chromium.org,
abhinavk@codeaurora.org, jsanka@codeaurora.org,
chandanu@codeaurora.org, nganji@codeaurora.org
Subject: [PATCH] msm:disp:dpu1: Fix core clk rate in display driver
Date: Wed, 27 Nov 2019 15:46:07 +0530 [thread overview]
Message-ID: <1574849767-6376-1-git-send-email-dhar@codeaurora.org> (raw)
Fix max core clk rate during dt parsing in display driver.
Signed-off-by: Shubhashree Dhar <dhar@codeaurora.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.c
index 27fbeb5..991fff1 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.c
@@ -187,6 +187,7 @@ int msm_dss_parse_clock(struct platform_device *pdev,
continue;
mp->clk_config[i].rate = rate;
mp->clk_config[i].type = DSS_CLK_PCLK;
+ mp->clk_config[i].max_rate = rate;
}
mp->num_clk = num_clk;
--
1.9.1
reply other threads:[~2019-11-27 10:16 UTC|newest]
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