From: Stephen Boyd <sboyd@kernel.org>
To: Michael Turquette <mturquette@baylibre.com>,
Taniya Das <tdas@codeaurora.org>,
robh@kernel.org
Cc: David Brown <david.brown@linaro.org>,
Rajendra Nayak <rnayak@codeaurora.org>,
linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
Andy Gross <agross@kernel.org>,
devicetree@vger.kernel.org, robh+dt@kernel.org,
Doug Anderson <dianders@chromium.org>,
Taniya Das <tdas@codeaurora.org>
Subject: Re: [PATCH v1 1/2] clk: qcom: videocc: Update the clock flag for video_cc_vcodec0_core_clk
Date: Wed, 12 Feb 2020 15:03:38 -0800 [thread overview]
Message-ID: <158154861845.184098.5172409402237427332@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <1581423236-21341-1-git-send-email-tdas@codeaurora.org>
Quoting Taniya Das (2020-02-11 04:13:55)
> The clock disable signal for video_cc_vcodec0_core_clk is tied to
> vcodec0_gdsc which is supported in the HW control mode. Thus turning off
> the clock would be taken care automatically when the GDSC turns OFF by
> hardware and clock driver does not require to poll on the CLK_OFF bit.
>
> Signed-off-by: Taniya Das <tdas@codeaurora.org>
> ---
Applied to clk-fixes
prev parent reply other threads:[~2020-02-12 23:03 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-11 12:13 [PATCH v1 1/2] clk: qcom: videocc: Update the clock flag for video_cc_vcodec0_core_clk Taniya Das
2020-02-11 12:13 ` [PATCH v1 2/2] clk: qcom: dispcc: Remove support of disp_cc_mdss_rscc_ahb_clk Taniya Das
2020-02-12 23:03 ` Stephen Boyd
2020-03-03 20:16 ` Matthias Kaehlcke
2020-03-04 3:35 ` Taniya Das
2020-03-04 17:09 ` Matthias Kaehlcke
2020-03-13 18:01 ` Stephen Boyd
[not found] ` <c6b19bac-b018-28a0-421f-f40f85245bee@codeaurora.org>
2020-03-16 18:33 ` Stephen Boyd
2020-02-12 0:33 ` [PATCH v1 1/2] clk: qcom: videocc: Update the clock flag for video_cc_vcodec0_core_clk Stephen Boyd
2020-02-12 23:03 ` Stephen Boyd [this message]
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