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From: Rajendra Nayak <rnayak@codeaurora.org>
To: agross@kernel.org, bjorn.andersson@linaro.org
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, mka@chromium.org,
	Rajendra Nayak <rnayak@codeaurora.org>
Subject: [PATCH 4/4] arm64: dts: sc7180: Add sdhc opps and power-domains
Date: Tue, 30 Jun 2020 14:15:12 +0530	[thread overview]
Message-ID: <1593506712-24557-5-git-send-email-rnayak@codeaurora.org> (raw)
In-Reply-To: <1593506712-24557-1-git-send-email-rnayak@codeaurora.org>

Add the power domain supporting performance state and the corresponding
OPP tables for the sdhc device on sc7180.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 78fef54..08ee49a 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -524,6 +524,8 @@
 			clocks = <&gcc GCC_SDCC1_APPS_CLK>,
 					<&gcc GCC_SDCC1_AHB_CLK>;
 			clock-names = "core", "iface";
+			power-domains = <&rpmhpd SC7180_CX>;
+			operating-points-v2 = <&sdhc1_opp_table>;
 
 			bus-width = <8>;
 			non-removable;
@@ -535,6 +537,20 @@
 			mmc-hs400-enhanced-strobe;
 
 			status = "disabled";
+
+			sdhc1_opp_table: sdhc1-opp-table {
+				compatible = "operating-points-v2";
+
+				opp-100000000 {
+					opp-hz = /bits/ 64 <100000000>;
+					required-opps = <&rpmhpd_opp_low_svs>;
+				};
+
+				opp-384000000 {
+					opp-hz = /bits/ 64 <384000000>;
+					required-opps = <&rpmhpd_opp_svs_l1>;
+				};
+			};
 		};
 
 		qup_opp_table: qup-opp-table {
@@ -2300,10 +2316,26 @@
 			clocks = <&gcc GCC_SDCC2_APPS_CLK>,
 					<&gcc GCC_SDCC2_AHB_CLK>;
 			clock-names = "core", "iface";
+			power-domains = <&rpmhpd SC7180_CX>;
+			operating-points-v2 = <&sdhc2_opp_table>;
 
 			bus-width = <4>;
 
 			status = "disabled";
+
+			sdhc2_opp_table: sdhc2-opp-table {
+				compatible = "operating-points-v2";
+
+				opp-100000000 {
+					opp-hz = /bits/ 64 <100000000>;
+					required-opps = <&rpmhpd_opp_low_svs>;
+				};
+
+				opp-202000000 {
+					opp-hz = /bits/ 64 <202000000>;
+					required-opps = <&rpmhpd_opp_svs_l1>;
+				};
+			};
 		};
 
 		qspi: spi@88dc000 {
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation


  parent reply	other threads:[~2020-06-30  8:46 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-30  8:45 [PATCH 0/4] sdm845/sc7180: Add OPP tables to support IO DVFS Rajendra Nayak
2020-06-30  8:45 ` [PATCH 1/4] arm64: dts: sdm845: Add OPP table for all qup devices Rajendra Nayak
2020-06-30 23:32   ` Matthias Kaehlcke
2020-06-30  8:45 ` [PATCH 2/4] arm64: dts: sc7180: " Rajendra Nayak
2020-06-30 23:37   ` Matthias Kaehlcke
2020-06-30  8:45 ` [PATCH 3/4] arm64: dts: sdm845: Add sdhc opps and power-domains Rajendra Nayak
2020-06-30 23:43   ` Matthias Kaehlcke
2020-06-30  8:45 ` Rajendra Nayak [this message]
2020-06-30 23:45   ` [PATCH 4/4] arm64: dts: sc7180: " Matthias Kaehlcke

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