From: Akhil P Oommen <akhilpo@codeaurora.org>
To: freedreno@lists.freedesktop.org
Cc: dri-devel@freedesktop.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, jcrouse@codeaurora.org,
smasetty@codeaurora.org, devicetree@vger.kernel.org,
mka@chromium.org, saravanak@google.com, sibis@codeaurora.org,
viresh.kumar@linaro.org, jonathan@marek.ca, robdclark@gmail.com
Subject: [PATCH v5 1/6] dt-bindings: drm/msm/gpu: Document gpu opp table
Date: Mon, 13 Jul 2020 18:11:41 +0530 [thread overview]
Message-ID: <1594644106-22449-2-git-send-email-akhilpo@codeaurora.org> (raw)
In-Reply-To: <1594644106-22449-1-git-send-email-akhilpo@codeaurora.org>
From: Sharat Masetty <smasetty@codeaurora.org>
Update documentation to list the gpu opp table bindings including the
newly added "opp-peak-kBps" needed for GPU-DDR bandwidth scaling.
Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
---
.../devicetree/bindings/display/msm/gpu.txt | 28 ++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt
index fd779cd..1af0ff1 100644
--- a/Documentation/devicetree/bindings/display/msm/gpu.txt
+++ b/Documentation/devicetree/bindings/display/msm/gpu.txt
@@ -112,6 +112,34 @@ Example a6xx (with GMU):
interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>;
interconnect-names = "gfx-mem";
+ gpu_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-430000000 {
+ opp-hz = /bits/ 64 <430000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
+ opp-peak-kBps = <5412000>;
+ };
+
+ opp-355000000 {
+ opp-hz = /bits/ 64 <355000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
+ opp-peak-kBps = <3072000>;
+ };
+
+ opp-267000000 {
+ opp-hz = /bits/ 64 <267000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
+ opp-peak-kBps = <3072000>;
+ };
+
+ opp-180000000 {
+ opp-hz = /bits/ 64 <180000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
+ opp-peak-kBps = <1804000>;
+ };
+ };
+
qcom,gmu = <&gmu>;
zap-shader {
--
2.7.4
next prev parent reply other threads:[~2020-07-13 12:42 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-13 12:41 [PATCH v5 0/6] Add support for GPU DDR BW scaling Akhil P Oommen
2020-07-13 12:41 ` Akhil P Oommen [this message]
2020-07-13 12:41 ` [PATCH v5 2/6] drm: msm: a6xx: send opp instead of a frequency Akhil P Oommen
2020-07-13 12:41 ` [PATCH v5 3/6] drm: msm: a6xx: use dev_pm_opp_set_bw to scale DDR Akhil P Oommen
2020-07-13 12:41 ` [PATCH v5 4/6] arm64: dts: qcom: SDM845: Enable GPU DDR bw scaling Akhil P Oommen
2020-07-13 12:41 ` [PATCH v5 5/6] arm64: dts: qcom: sc7180: Add interconnects property for GPU Akhil P Oommen
2020-07-15 18:27 ` Rob Clark
2020-07-13 12:41 ` [PATCH v5 6/6] arm64: dts: qcom: sc7180: Add opp-peak-kBps to GPU opp Akhil P Oommen
2020-07-15 15:36 ` [PATCH v5 0/6] Add support for GPU DDR BW scaling Rob Clark
2020-07-20 10:01 ` Viresh Kumar
2020-07-20 15:03 ` Rob Clark
2020-07-21 3:24 ` Viresh Kumar
2020-07-21 14:28 ` Rob Clark
2020-07-22 5:30 ` Viresh Kumar
2020-07-22 15:47 ` Rob Clark
2020-07-22 23:01 ` Daniel Vetter
2020-07-30 5:10 ` Viresh Kumar
2020-07-30 15:27 ` Rob Clark
2020-07-30 15:37 ` Viresh Kumar
2020-07-30 15:46 ` Rob Clark
2020-07-30 21:26 ` Rob Clark
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