From: Rajendra Nayak <rnayak@codeaurora.org>
To: stanimir.varbanov@linaro.org, robh+dt@kernel.org,
agross@kernel.org, bjorn.andersson@linaro.org
Cc: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
mka@chromium.org, Rajendra Nayak <rnayak@codeaurora.org>
Subject: [PATCH v4 4/5] arm64: dts: sdm845: Add OPP tables and power-domains for venus
Date: Thu, 23 Jul 2020 16:56:51 +0530 [thread overview]
Message-ID: <1595503612-2901-5-git-send-email-rnayak@codeaurora.org> (raw)
In-Reply-To: <1595503612-2901-1-git-send-email-rnayak@codeaurora.org>
Add the OPP tables in order to be able to vote on the performance state of
a power-domain.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 40 ++++++++++++++++++++++++++++++++++--
1 file changed, 38 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index e506793..5ca2265 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -3631,8 +3631,10 @@
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&videocc VENUS_GDSC>,
<&videocc VCODEC0_GDSC>,
- <&videocc VCODEC1_GDSC>;
- power-domain-names = "venus", "vcodec0", "vcodec1";
+ <&videocc VCODEC1_GDSC>,
+ <&rpmhpd SDM845_CX>;
+ power-domain-names = "venus", "vcodec0", "vcodec1", "cx";
+ operating-points-v2 = <&venus_opp_table>;
clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
<&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
@@ -3654,6 +3656,40 @@
video-core1 {
compatible = "venus-encoder";
};
+
+ venus_opp_table: venus-opp-table {
+ compatible = "operating-points-v2";
+
+ opp-100000000 {
+ opp-hz = /bits/ 64 <100000000>;
+ required-opps = <&rpmhpd_opp_min_svs>;
+ };
+
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-320000000 {
+ opp-hz = /bits/ 64 <320000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ };
+
+ opp-380000000 {
+ opp-hz = /bits/ 64 <380000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-444000000 {
+ opp-hz = /bits/ 64 <444000000>;
+ required-opps = <&rpmhpd_opp_nom>;
+ };
+
+ opp-533000000 {
+ opp-hz = /bits/ 64 <533000000>;
+ required-opps = <&rpmhpd_opp_turbo>;
+ };
+ };
};
videocc: clock-controller@ab00000 {
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2020-07-23 11:27 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-23 11:26 [PATCH v4 0/5] DVFS support for Venus Rajendra Nayak
2020-07-23 11:26 ` [PATCH v4 1/5] dt-bindings: media: venus: Add an optional power domain for perf voting Rajendra Nayak
2020-07-23 17:30 ` Rob Herring
2020-07-23 11:26 ` [PATCH v4 2/5] media: venus: core: Fix error handling in probe Rajendra Nayak
2020-07-24 14:55 ` Stanimir Varbanov
2020-07-23 11:26 ` [PATCH v4 3/5] media: venus: core: Add support for opp tables/perf voting Rajendra Nayak
2020-07-26 12:47 ` Stanimir Varbanov
2020-07-23 11:26 ` Rajendra Nayak [this message]
2020-07-23 18:06 ` [PATCH v4 4/5] arm64: dts: sdm845: Add OPP tables and power-domains for venus Stanimir Varbanov
2020-07-24 8:49 ` Rajendra Nayak
2020-07-24 10:16 ` Stanimir Varbanov
2020-07-24 9:02 ` Rajendra Nayak
2020-07-24 16:28 ` Lina Iyer
2020-07-24 16:52 ` Stanimir Varbanov
2020-07-24 17:00 ` Stanimir Varbanov
2020-07-28 0:45 ` Stephen Boyd
2020-07-28 16:52 ` Lina Iyer
2020-07-28 19:51 ` Stephen Boyd
2020-07-28 20:11 ` Lina Iyer
2020-07-29 18:10 ` Doug Anderson
2020-07-29 20:38 ` Bjorn Andersson
2020-07-24 14:09 ` Stanimir Varbanov
2020-07-27 5:53 ` Rajendra Nayak
2020-07-27 12:08 ` Rajendra Nayak
2020-07-27 15:38 ` Viresh Kumar
2020-07-28 0:52 ` Stephen Boyd
2020-07-28 4:17 ` Rajendra Nayak
2020-07-28 19:54 ` Stephen Boyd
2020-07-23 11:26 ` [PATCH v4 5/5] arm64: dts: sc7180: " Rajendra Nayak
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