From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01AE7C433E7 for ; Tue, 13 Oct 2020 18:33:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A9CAF20E65 for ; Tue, 13 Oct 2020 18:33:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="JrMQCI/9" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387608AbgJMSdz (ORCPT ); Tue, 13 Oct 2020 14:33:55 -0400 Received: from m42-4.mailgun.net ([69.72.42.4]:30663 "EHLO m42-4.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731158AbgJMSdw (ORCPT ); Tue, 13 Oct 2020 14:33:52 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1602614032; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=UlQQZJMTNWAVSa+0hA2FXSLe0acOMZ4vnePW50VY0bY=; b=JrMQCI/9DkP3Ed7HSuJE047vHTsx9256WTMg6ob+taMB2vcBcSc7FuqrJCt08T9tLWcSF0BG CePkd8Mx+ycmcL5t7EsfeiV8BiEpFtQnnVX8dCP7rsNdZ9aWwr8tk3viLfWuojSDyUyuL9yj AFDaAKdE86iklYNYABdDPZC7WoQ= X-Mailgun-Sending-Ip: 69.72.42.4 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n05.prod.us-west-2.postgun.com with SMTP id 5f85f309d6d00c7a9e1e2ed8 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Tue, 13 Oct 2020 18:33:45 GMT Sender: tdas=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 736D4C433FF; Tue, 13 Oct 2020 18:33:45 +0000 (UTC) Received: from tdas-linux.qualcomm.com (unknown [202.46.22.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: tdas) by smtp.codeaurora.org (Postfix) with ESMTPSA id 5D3C6C433F1; Tue, 13 Oct 2020 18:33:41 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 5D3C6C433F1 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=tdas@codeaurora.org From: Taniya Das To: Stephen Boyd , =?UTF-8?q?Michael=20Turquette=20=C2=A0?= Cc: David Brown , Rajendra Nayak , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Gross , Taniya Das Subject: [PATCH v0] clk: qcom: lpasscc: Re-configure the PLL in case lost Date: Wed, 14 Oct 2020 00:03:28 +0530 Message-Id: <1602614008-2421-2-git-send-email-tdas@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1602614008-2421-1-git-send-email-tdas@codeaurora.org> References: <1602614008-2421-1-git-send-email-tdas@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In the case where the PLL configuration is lost, then the pm runtime resume will reconfigure before usage. Fixes: edab812d802d ("clk: qcom: lpass: Add support for LPASS clock controller for SC7180") Signed-off-by: Taniya Das --- drivers/clk/qcom/lpasscorecc-sc7180.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/clk/qcom/lpasscorecc-sc7180.c b/drivers/clk/qcom/lpasscorecc-sc7180.c index 228d08f..5804a93 100644 --- a/drivers/clk/qcom/lpasscorecc-sc7180.c +++ b/drivers/clk/qcom/lpasscorecc-sc7180.c @@ -356,6 +356,25 @@ static const struct qcom_cc_desc lpass_audio_hm_sc7180_desc = { .num_gdscs = ARRAY_SIZE(lpass_audio_hm_sc7180_gdscs), }; +static int lpass_core_cc_pm_clk_resume(struct device *dev) +{ + struct regmap *regmap = dev_get_drvdata(dev); + int l_val; + + pm_clk_resume(dev); + + /* Read PLL_L_VAL */ + regmap_read(regmap, 0x1004, &l_val); + if (!l_val) + clk_fabia_pll_configure(&lpass_lpaaudio_dig_pll, regmap, + &lpass_lpaaudio_dig_pll_config); + return 0; +} + +static const struct dev_pm_ops lpass_core_pm_ops = { + SET_RUNTIME_PM_OPS(pm_clk_suspend, lpass_core_cc_pm_clk_resume, NULL) +}; + static int lpass_core_cc_sc7180_probe(struct platform_device *pdev) { const struct qcom_cc_desc *desc; @@ -386,6 +405,9 @@ static int lpass_core_cc_sc7180_probe(struct platform_device *pdev) clk_fabia_pll_configure(&lpass_lpaaudio_dig_pll, regmap, &lpass_lpaaudio_dig_pll_config); + pdev->dev.driver->pm = &lpass_core_pm_ops; + dev_set_drvdata(&pdev->dev, regmap); + return qcom_cc_really_probe(pdev, &lpass_core_cc_sc7180_desc, regmap); } -- Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.