* [v1] drm/msm/disp/dpu1: fix warning reported by kernel bot in dpu driver
@ 2021-03-04 9:40 Kalyan Thota
0 siblings, 0 replies; only message in thread
From: Kalyan Thota @ 2021-03-04 9:40 UTC (permalink / raw)
To: y, dri-devel, linux-arm-msm, freedreno, devicetree
Cc: Kalyan Thota, linux-kernel, robdclark, dianders, mkrishn, dan.carpenter
Fix a warning, pointing to an early deference of a variable before
check. This bug was introduced in the following commit.
commit 4259ff7ae509
("drm/msm/dpu: add support for pcc color block in dpu driver")
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
index a7a2453..0f9974c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
@@ -26,10 +26,16 @@ static void dpu_setup_dspp_pcc(struct dpu_hw_dspp *ctx,
struct dpu_hw_pcc_cfg *cfg)
{
- u32 base = ctx->cap->sblk->pcc.base;
+ u32 base;
- if (!ctx || !base) {
- DRM_ERROR("invalid ctx %pK pcc base 0x%x\n", ctx, base);
+ if (!ctx) {
+ DRM_ERROR("invalid dspp ctx %pK\n", ctx);
+ return;
+ }
+
+ base = ctx->cap->sblk->pcc.base;
+ if (!base) {
+ DRM_ERROR("invalid pcc base 0x%x\n", base);
return;
}
--
2.7.4
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