From: Bhaumik Bhatt <bbhatt@codeaurora.org>
To: manivannan.sadhasivam@linaro.org
Cc: linux-arm-msm@vger.kernel.org, hemantk@codeaurora.org,
jhugo@codeaurora.org, linux-kernel@vger.kernel.org,
loic.poulain@linaro.org, linux-wireless@vger.kernel.org,
kvalo@codeaurora.org, ath11k@lists.infradead.org,
Bhaumik Bhatt <bbhatt@codeaurora.org>
Subject: [PATCH v3 0/6] BHI/BHIe improvements for MHI power purposes
Date: Wed, 5 May 2021 10:08:15 -0700 [thread overview]
Message-ID: <1620234501-30461-1-git-send-email-bbhatt@codeaurora.org> (raw)
This patch series improves the power up behavior by allowing MHI host driver to
set BHI and/or BHIe offsets early on in the preparation phase and fail pre-power
up if offsets are not found or not within a limited MMIO region. This also
allows MHI host to clean up the offsets in the unprepare after power down phase.
Going forward, controllers will be required to specify a reg_len field which
will be used to check whether the BHI/BHIe offsets are in range or not.
This series has been tested on X86_64 architecture with the PCI generic driver
as controller and an SDX55 device.
v3:
-Added reviewed-by tags
-Updated order of reg_len in mhi_controller structure documentation
v2:
-Added reviewed-by tags
-Moved reg_len entry in mhi_controller structure to allow for a packed struct
Bhaumik Bhatt (6):
bus: mhi: core: Set BHI/BHIe offsets on power up preparation
bus: mhi: core: Set BHI and BHIe pointers to NULL in clean-up
bus: mhi: Add MMIO region length to controller structure
ath11k: set register access length for MHI driver
bus: mhi: pci_generic: Set register access length for MHI driver
bus: mhi: core: Add range checks for BHI and BHIe
drivers/bus/mhi/core/init.c | 58 +++++++++++++++++++++++------------
drivers/bus/mhi/core/pm.c | 28 +++--------------
drivers/bus/mhi/pci_generic.c | 1 +
drivers/net/wireless/ath/ath11k/mhi.c | 1 +
include/linux/mhi.h | 2 ++
5 files changed, 47 insertions(+), 43 deletions(-)
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next reply other threads:[~2021-05-05 17:28 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-05 17:08 Bhaumik Bhatt [this message]
2021-05-05 17:08 ` [PATCH v3 1/6] bus: mhi: core: Set BHI/BHIe offsets on power up preparation Bhaumik Bhatt
2021-05-06 0:25 ` Hemant Kumar
2021-05-05 17:08 ` [PATCH v3 2/6] bus: mhi: core: Set BHI and BHIe pointers to NULL in clean-up Bhaumik Bhatt
2021-05-06 0:17 ` Hemant Kumar
2021-05-05 17:08 ` [PATCH v3 3/6] bus: mhi: Add MMIO region length to controller structure Bhaumik Bhatt
2021-05-06 0:16 ` Hemant Kumar
2021-05-05 17:08 ` [PATCH v3 4/6] ath11k: set register access length for MHI driver Bhaumik Bhatt
2021-05-06 0:15 ` Hemant Kumar
2021-05-05 17:08 ` [PATCH v3 5/6] bus: mhi: pci_generic: Set " Bhaumik Bhatt
2021-05-06 0:14 ` Hemant Kumar
2021-05-06 8:03 ` Loic Poulain
2021-05-05 17:08 ` [PATCH v3 6/6] bus: mhi: core: Add range checks for BHI and BHIe Bhaumik Bhatt
2021-05-06 0:12 ` Hemant Kumar
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