From: Wesley Cheng <email@example.com>
To: firstname.lastname@example.org, email@example.com, firstname.lastname@example.org,
Cc: email@example.com, firstname.lastname@example.org,
Wesley Cheng <email@example.com>
Subject: [PATCH v8 0/5] Re-introduce TX FIFO resize for larger EP bursting
Date: Wed, 19 May 2021 00:43:53 -0700 [thread overview]
Message-ID: <firstname.lastname@example.org> (raw)
Changes in V8:
- Rebased to usb-testing
- Using devm_kzalloc for adding txfifo property in dwc3-qcom
- Removed DWC3 QCOM ACPI property for enabling the txfifo resize
Changes in V7:
- Added a new property tx-fifo-max-num for limiting how much fifo space the
resizing logic can allocate for endpoints with large burst values. This
can differ across platforms, and tie in closely with overall system latency.
- Added recommended checks for DWC32.
- Added changes to set the tx-fifo-resize property from dwc3-qcom by default
instead of modifying the current DTSI files.
- Added comments on all APIs/variables introduced.
- Updated the DWC3 YAML to include a better description of the tx-fifo-resize
property and added an entry for tx-fifo-max-num.
Changes in V6:
- Rebased patches to usb-testing.
- Renamed to PATCH series instead of RFC.
- Checking for fs_descriptors instead of ss_descriptors for determining the
endpoint count for a particular configuration.
- Re-ordered patch series to fix patch dependencies.
Changes in V5:
- Added check_config() logic, which is used to communicate the number of EPs
used in a particular configuration. Based on this, the DWC3 gadget driver
has the ability to know the maximum number of eps utilized in all configs.
This helps reduce unnecessary allocation to unused eps, and will catch fifo
allocation issues at bind() time.
- Fixed variable declaration to single line per variable, and reverse xmas.
- Created a helper for fifo clearing, which is used by ep0.c
Changes in V4:
- Removed struct dwc3* as an argument for dwc3_gadget_resize_tx_fifos()
- Removed WARN_ON(1) in case we run out of fifo space
Changes in V3:
- Removed "Reviewed-by" tags
- Renamed series back to RFC
- Modified logic to ensure that fifo_size is reset if we pass the minimum
threshold. Tested with binding multiple FDs requesting 6 FIFOs.
Changes in V2:
- Modified TXFIFO resizing logic to ensure that each EP is reserved a
- Removed dev_dbg() prints and fixed typos from patches
- Added some more description on the dt-bindings commit message
Currently, there is no functionality to allow for resizing the TXFIFOs, and
relying on the HW default setting for the TXFIFO depth. In most cases, the
HW default is probably sufficient, but for USB compositions that contain
multiple functions that require EP bursting, the default settings
might not be enough. Also to note, the current SW will assign an EP to a
function driver w/o checking to see if the TXFIFO size for that particular
EP is large enough. (this is a problem if there are multiple HW defined
values for the TXFIFO size)
It is mentioned in the SNPS databook that a minimum of TX FIFO depth = 3
is required for an EP that supports bursting. Otherwise, there may be
frequent occurences of bursts ending. For high bandwidth functions,
such as data tethering (protocols that support data aggregation), mass
storage, and media transfer protocol (over FFS), the bMaxBurst value can be
large, and a bigger TXFIFO depth may prove to be beneficial in terms of USB
throughput. (which can be associated to system access latency, etc...) It
allows for a more consistent burst of traffic, w/o any interruptions, as
data is readily available in the FIFO.
With testing done using the mass storage function driver, the results show
that with a larger TXFIFO depth, the bandwidth increased significantly.
- Platform: Qualcomm SM8150
- bMaxBurst = 6
- USB req size = 256kB
- Num of USB reqs = 16
- USB Speed = Super-Speed
- Function Driver: Mass Storage (w/ ramdisk)
- Test Application: CrystalDiskMark
TXFIFO Depth = 3 max packets
Test Case | Data Size | AVG tput (in MB/s)
Sequential|1 GB x |
Read |9 loops | 193.60
| | 195.86
| | 184.77
| | 193.60
TXFIFO Depth = 6 max packets
Test Case | Data Size | AVG tput (in MB/s)
Sequential|1 GB x |
Read |9 loops | 287.35
| | 304.94
| | 289.64
| | 293.61
Wesley Cheng (5):
usb: gadget: udc: core: Introduce check_config to verify USB
usb: gadget: configfs: Check USB configuration before adding
usb: dwc3: Resize TX FIFOs to meet EP bursting requirements
usb: dwc3: dwc3-qcom: Enable tx-fifo-resize property by default
arm64: boot: dts: qcom: sm8150: Enable dynamic TX FIFO resize logic
arch/arm64/boot/dts/qcom/sm8150.dtsi | 1 +
drivers/usb/dwc3/core.c | 9 ++
drivers/usb/dwc3/core.h | 15 +++
drivers/usb/dwc3/dwc3-qcom.c | 9 ++
drivers/usb/dwc3/ep0.c | 2 +
drivers/usb/dwc3/gadget.c | 212 +++++++++++++++++++++++++++++++++++
drivers/usb/gadget/configfs.c | 22 ++++
drivers/usb/gadget/udc/core.c | 25 +++++
include/linux/usb/gadget.h | 5 +
9 files changed, 300 insertions(+)
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next reply other threads:[~2021-05-19 7:44 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-19 7:43 Wesley Cheng [this message]
2021-05-19 7:43 ` [PATCH v8 1/5] usb: gadget: udc: core: Introduce check_config to verify USB configuration Wesley Cheng
2021-05-19 7:43 ` [PATCH v8 2/5] usb: gadget: configfs: Check USB configuration before adding Wesley Cheng
2021-05-19 7:43 ` [PATCH v8 3/5] usb: dwc3: Resize TX FIFOs to meet EP bursting requirements Wesley Cheng
2021-05-19 7:43 ` [PATCH v8 4/5] usb: dwc3: dwc3-qcom: Enable tx-fifo-resize property by default Wesley Cheng
2021-05-19 7:43 ` [PATCH v8 5/5] arm64: boot: dts: qcom: sm8150: Enable dynamic TX FIFO resize logic Wesley Cheng
2021-05-29 17:07 ` Bjorn Andersson
2021-05-29 19:24 ` Jack Pham
2021-05-29 0:40 ` [PATCH v8 0/5] Re-introduce TX FIFO resize for larger EP bursting Wesley Cheng
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