From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9CC7AC49EAB for ; Mon, 28 Jun 2021 12:09:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7C46061C71 for ; Mon, 28 Jun 2021 12:09:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232978AbhF1ML2 (ORCPT ); Mon, 28 Jun 2021 08:11:28 -0400 Received: from alexa-out.qualcomm.com ([129.46.98.28]:8336 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232950AbhF1ML0 (ORCPT ); Mon, 28 Jun 2021 08:11:26 -0400 Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 28 Jun 2021 05:09:01 -0700 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 28 Jun 2021 05:08:59 -0700 X-QCInternal: smtphost Received: from c-sanm-linux.qualcomm.com ([10.206.25.31]) by ironmsg02-blr.qualcomm.com with ESMTP; 28 Jun 2021 17:38:26 +0530 Received: by c-sanm-linux.qualcomm.com (Postfix, from userid 2343233) id C00313A48; Mon, 28 Jun 2021 17:38:24 +0530 (IST) From: Sandeep Maheswaram To: Andy Gross , Bjorn Andersson , Greg Kroah-Hartman , Felipe Balbi , Stephen Boyd , Doug Anderson , Matthias Kaehlcke , Mathias Nyman Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Pratham Pratap , Sandeep Maheswaram Subject: [PATCH v8 1/6] usb: dwc3: core: Add HS phy mode variable and phy poweroff flag Date: Mon, 28 Jun 2021 17:38:12 +0530 Message-Id: <1624882097-23265-2-git-send-email-sanm@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1624882097-23265-1-git-send-email-sanm@codeaurora.org> References: <1624882097-23265-1-git-send-email-sanm@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add variables in dwc3 structure to check HS phy mode which is used to configure interrupts and phy poweroff flag to check if we can powerdown the phy during system suspend. Signed-off-by: Sandeep Maheswaram --- drivers/usb/dwc3/core.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index dccdf13..ce274d8 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -1123,6 +1123,9 @@ struct dwc3 { bool phys_ready; + unsigned int hs_phy_mode; + bool phy_power_off; + struct ulpi *ulpi; bool ulpi_ready; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation