From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 643EFC433FE for ; Fri, 17 Sep 2021 17:16:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 49B046124D for ; Fri, 17 Sep 2021 17:16:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232357AbhIQRRr (ORCPT ); Fri, 17 Sep 2021 13:17:47 -0400 Received: from so254-9.mailgun.net ([198.61.254.9]:19583 "EHLO so254-9.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244848AbhIQRRr (ORCPT ); Fri, 17 Sep 2021 13:17:47 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1631898985; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=M4DBHwmThDmwQVFAKJtW+brHb96jLrv1uHjhvN73azU=; b=o1kVVxDSFBGFANGbkOSm2mum7d73Z5qhIX/bD6D0xlZMuSLE4/0fGwV4+oe9heq/ZBFlJTg1 C5+glgr5H0bvYBYl7bN0NLTZVW2N0bXOsWMwWUwssa5D+la9jCc4ZN9pqCA8vy6iBejNIsAG wQ93D6stW6GeGjqMjIKcW2w7UPU= X-Mailgun-Sending-Ip: 198.61.254.9 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n02.prod.us-east-1.postgun.com with SMTP id 6144cd63bd6681d8ed5b0133 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Fri, 17 Sep 2021 17:16:19 GMT Sender: pmaliset=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 1EDAAC43618; Fri, 17 Sep 2021 17:16:19 +0000 (UTC) Received: from pmaliset-linux.qualcomm.com (unknown [202.46.22.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: pmaliset) by smtp.codeaurora.org (Postfix) with ESMTPSA id 9F343C4360D; Fri, 17 Sep 2021 17:16:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.codeaurora.org 9F343C4360D Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=codeaurora.org From: Prasad Malisetty To: agross@kernel.org, bjorn.andersson@linaro.org, bhelgaas@google.com, robh+dt@kernel.org, swboyd@chromium.org, lorenzo.pieralisi@arm.com, svarbanov@mm-sol.com Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, mka@chromium.org, vbadigan@codeaurora.org, sallenki@codeaurora.org, manivannan.sadhasivam@linaro.org, Prasad Malisetty Subject: [PATCH v8 3/4] arm64: dts: qcom: sc7280: Add PCIe nodes for IDP board Date: Fri, 17 Sep 2021 22:45:46 +0530 Message-Id: <1631898947-27433-4-git-send-email-pmaliset@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1631898947-27433-1-git-send-email-pmaliset@codeaurora.org> References: <1631898947-27433-1-git-send-email-pmaliset@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable PCIe controller and PHY for sc7280 IDP board. Add specific NVMe GPIO entries for SKU1 and SKU2 support. Signed-off-by: Prasad Malisetty --- arch/arm64/boot/dts/qcom/sc7280-idp.dts | 4 ++++ arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 40 ++++++++++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sc7280-idp2.dts | 4 ++++ 3 files changed, 48 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts b/arch/arm64/boot/dts/qcom/sc7280-idp.dts index 64fc22a..1a37b29 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts @@ -61,6 +61,10 @@ modem-init; }; +&nvme_ldo_enable_pin { + pins = "gpio19"; +}; + &pmk8350_vadc { pmr735a_die_temp { reg = ; diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi index 99f9ee5..ee00df0 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -199,6 +199,39 @@ modem-init; }; +&pcie1 { + status = "okay"; + + perst-gpio = <&tlmm 2 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&pcie1_default_state &nvme_ldo_enable_pin>; +}; + +&pcie1_phy { + status = "okay"; + + vdda-phy-supply = <&vreg_l10c_0p8>; + vdda-pll-supply = <&vreg_l6b_1p2>; +}; + +&pcie1_default_state { + reset-n { + pins = "gpio2"; + function = "gpio"; + + drive-strength = <16>; + output-low; + bias-disable; + }; + + wake-n { + pins = "gpio3"; + function = "gpio"; + + drive-strength = <2>; + bias-pull-up; + }; +}; + &pmk8350_vadc { pmk8350_die_temp { reg = ; @@ -343,3 +376,10 @@ bias-pull-up; }; }; + +&tlmm { + nvme_ldo_enable_pin: nvme_ldo_enable_pin { + function = "gpio"; + bias-pull-up; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp2.dts b/arch/arm64/boot/dts/qcom/sc7280-idp2.dts index 1fc2add..dc0f0404 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp2.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-idp2.dts @@ -21,3 +21,7 @@ stdout-path = "serial0:115200n8"; }; }; + +&nvme_ldo_enable_pin { + pins = "gpio51"; +}; -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project