From: Jonathan McDowell <noodles@earth.li>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Ansuel Smith <ansuelsmth@gmail.com>,
Vinod Koul <vkoul@kernel.org>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 1/5] ARM: dts: qcom: Add ADM DMA + NAND definitions to ipq806x
Date: Thu, 20 May 2021 18:29:39 +0100 [thread overview]
Message-ID: <17f88a26860f5976ad08dd3c12ea079ba474b6fd.1621531633.git.noodles@earth.li> (raw)
In-Reply-To: <cover.1621531633.git.noodles@earth.li>
Now the ADM driver is in mainline add the appropriate definitions for it
and the NAND controller to get NAND working on IPQ806x platforms,
Signed-off-by: Jonathan McDowell <noodles@earth.li>
---
arch/arm/boot/dts/qcom-ipq8064.dtsi | 67 +++++++++++++++++++++++++++++
1 file changed, 67 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index 98995ead4413..3f666021ff23 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -185,6 +185,31 @@
bias-pull-up;
};
};
+
+ nand_pins: nand_pins {
+ mux {
+ pins = "gpio34", "gpio35", "gpio36",
+ "gpio37", "gpio38", "gpio39",
+ "gpio40", "gpio41", "gpio42",
+ "gpio43", "gpio44", "gpio45",
+ "gpio46", "gpio47";
+ function = "nand";
+ drive-strength = <10>;
+ bias-disable;
+ };
+
+ pullups {
+ pins = "gpio39";
+ bias-pull-up;
+ };
+
+ hold {
+ pins = "gpio40", "gpio41", "gpio42",
+ "gpio43", "gpio44", "gpio45",
+ "gpio46", "gpio47";
+ bias-bus-hold;
+ };
+ };
};
intc: interrupt-controller@2000000 {
@@ -226,6 +251,26 @@
reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
};
+ adm_dma: dma-controller@18300000 {
+ compatible = "qcom,adm";
+ reg = <0x18300000 0x100000>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+
+ clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
+ clock-names = "core", "iface";
+
+ resets = <&gcc ADM0_RESET>,
+ <&gcc ADM0_PBUS_RESET>,
+ <&gcc ADM0_C0_RESET>,
+ <&gcc ADM0_C1_RESET>,
+ <&gcc ADM0_C2_RESET>;
+ reset-names = "clk", "pbus", "c0", "c1", "c2";
+ qcom,ee = <0>;
+
+ status = "disabled";
+ };
+
saw0: regulator@2089000 {
compatible = "qcom,saw2";
reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
@@ -403,6 +448,28 @@
status = "disabled";
};
+ nand: nand-controller@1ac00000 {
+ compatible = "qcom,ipq806x-nand";
+ reg = <0x1ac00000 0x800>;
+
+ pinctrl-0 = <&nand_pins>;
+ pinctrl-names = "default";
+
+ clocks = <&gcc EBI2_CLK>,
+ <&gcc EBI2_AON_CLK>;
+ clock-names = "core", "aon";
+
+ dmas = <&adm_dma 3>;
+ dma-names = "rxtx";
+ qcom,cmd-crci = <15>;
+ qcom,data-crci = <3>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ };
+
sata: sata@29000000 {
compatible = "qcom,ipq806x-ahci", "generic-ahci";
reg = <0x29000000 0x180>;
--
2.20.1
next prev parent reply other threads:[~2021-05-20 17:29 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-15 16:52 [PATCH 0/5] ARM: dts: qcom: Enable various devices for IPQ806x / RB3011 Jonathan McDowell
2021-05-15 16:52 ` [PATCH 1/5] ARM: dts: qcom: Add ADM DMA + NAND definitions to ipq806x Jonathan McDowell
2021-05-17 9:40 ` Vinod Koul
2021-05-19 10:29 ` Jonathan McDowell
2021-05-15 16:52 ` [PATCH 2/5] ARM: dts: qcom: Add tsens details " Jonathan McDowell
2021-05-17 9:42 ` Vinod Koul
2021-05-19 11:00 ` Jonathan McDowell
2021-05-15 16:52 ` [PATCH 3/5] ARM: dts: qcom: Add USB port definitions " Jonathan McDowell
2021-05-15 16:53 ` [PATCH 4/5] ARM: dts: qcom: add L2CC and RPM for IPQ8064 Jonathan McDowell
2021-05-15 16:53 ` [PATCH 5/5] ARM: dts: qcom: Enable NAND + USB for RB3011 Jonathan McDowell
2021-05-20 17:29 ` [PATCH v2 0/5] ARM: dts: qcom: Enable various devices for IPQ806x / RB3011 Jonathan McDowell
2021-05-20 17:29 ` Jonathan McDowell [this message]
2021-05-20 17:29 ` [PATCH v2 2/5] ARM: dts: qcom: Add tsens details to ipq806x Jonathan McDowell
2021-05-20 17:30 ` [PATCH v2 3/5] ARM: dts: qcom: Add USB port definitions " Jonathan McDowell
2021-05-31 15:58 ` Bjorn Andersson
2021-05-20 17:30 ` [PATCH v2 4/5] ARM: dts: qcom: add L2CC and RPM for IPQ8064 Jonathan McDowell
2021-05-20 17:30 ` [PATCH v2 5/5] ARM: dts: qcom: Enable NAND + USB for RB3011 Jonathan McDowell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=17f88a26860f5976ad08dd3c12ea079ba474b6fd.1621531633.git.noodles@earth.li \
--to=noodles@earth.li \
--cc=agross@kernel.org \
--cc=ansuelsmth@gmail.com \
--cc=bjorn.andersson@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=robh+dt@kernel.org \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).