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Message-ID: <1e288e5bee3f2a18e0ddb8b7a50158ecb793822d.camel@bootlin.com>
Subject: MHI driver issue with Sierra Wireless AirPrime EM919X
From:   Thomas Perrot <thomas.perrot@bootlin.com>
To:     linux-arm-msm@vger.kernel.org
Cc:     manivannan.sadhasivam@linaro.org, manivannan.sadhasivam@linaro.org,
        bbhatt@codeaurora.org
Date:   Fri, 30 Jul 2021 19:52:18 +0200
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Hello,

I=E2=80=99m trying to use the MHI driver with a Sierra Wireless AirPrime EM=
919X
connected to an NXP i.MX6DL through a PCIe gen2 bus, on 5.13.6, but the
device initialisation fails, as follows:

[    3.029401] mhi-pci-generic 0000:01:00.0: BAR 0: assigned [mem
0x01100000-0x01100fff 64bit]
[    3.041095] mhi-pci-generic 0000:01:00.0: enabling device (0140 ->
0142)
[    3.118299] mhi mhi0: Requested to power ON
[   11.370361] mhi mhi0: Power on setup success
[   11.372503] mhi mhi0: Wait for device to enter SBL or Mission mode
[   15.664068] mhi-pci-generic 0000:01:00.0: failed to suspend device:
-16
[   22.619948] mhi-pci-generic 0000:01:00.0: refused to change power
state from D3hot to D0
[   57.289998] mhi-pci-generic 0000:01:00.0: can't change power state
from D3hot to D0 (config space inaccessible)
[   73.769675] mhi-pci-generic 0000:01:00.0: can't change power state
from D3cold to D0 (config space inaccessible)
[   73.780188] mhi-pci-generic 0000:01:00.0: can't change power state
from D3hot to D0 (config space inaccessible)
[   73.836150] PC is at mhi_pci_read_reg+0xc/0x14
[   73.840642] LR is at mhi_get_mhi_state+0x2c/0x5c
[   74.121120] [<c05dcaf4>] (mhi_pci_read_reg) from [<c05d754c>]
(mhi_get_mhi_state+0x2c/0x5c)
[   74.129529] [<c05d754c>] (mhi_get_mhi_state) from [<c05da440>]
(mhi_pm_resume+0x38/0x298)
[   74.137754] [<c05da440>] (mhi_pm_resume) from [<c05dcbd0>]
(mhi_pci_runtime_resume+0x70/0xe0)
[   74.146326] [<c05dcbd0>] (mhi_pci_runtime_resume) from [<c0604da0>]
(pci_pm_runtime_resume+0x84/0xa0)

Do you have any idea where the issue might come from?

MHI seems to enter in READY state and waiting to enter in SBL or
Mission mode when the issue occurs, the host can start MHI
initialization by programming MMIO registers and sets the device into
MHI_M0 state.

Best regards,
Thomas

--=20
Thomas Perrot, Bootlin
Embedded Linux and kernel engineering
https://bootlin.com


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