From: Devi Priya <quic_devipriy@quicinc.com>
To: Sricharan Ramabadhran <quic_srichara@quicinc.com>,
<agross@kernel.org>, <andersson@kernel.org>,
<konrad.dybcio@linaro.org>, <lpieralisi@kernel.org>,
<kw@linux.com>, <robh@kernel.org>, <bhelgaas@google.com>,
<krzysztof.kozlowski+dt@linaro.org>, <vkoul@kernel.org>,
<kishon@kernel.org>, <mturquette@baylibre.com>,
<sboyd@kernel.org>, <mani@kernel.org>, <p.zabel@pengutronix.de>,
<svarbanov@mm-sol.com>, <linux-arm-msm@vger.kernel.org>,
<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-phy@lists.infradead.org>,
<linux-clk@vger.kernel.org>
Cc: <quic_gokulsri@quicinc.com>, <quic_sjaganat@quicinc.com>,
<quic_kathirav@quicinc.com>, <quic_arajkuma@quicinc.com>,
<quic_anusha@quicinc.com>
Subject: Re: [PATCH 6/7] clk: qcom: gcc-ipq9574: Add PCIe related clocks
Date: Mon, 20 Feb 2023 19:14:29 +0530 [thread overview]
Message-ID: <1ec15d17-9079-5577-757c-8113e394edef@quicinc.com> (raw)
In-Reply-To: <0d5f6df8-bb44-f9fe-8d5c-50e488ae4c53@quicinc.com>
On 2/17/2023 2:13 PM, Sricharan Ramabadhran wrote:
> Hi Devi,
>
> On 2/14/2023 10:11 PM, Devi Priya wrote:
>> Add the clocks needed for enabling PCIe in IPQ9574
>>
>> Co-developed-by: Anusha Rao <quic_anusha@quicinc.com>
>> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
>> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
>> ---
>> drivers/clk/qcom/gcc-ipq9574.c | 76 ++++++++++++++++++++++++++++++++++
>> 1 file changed, 76 insertions(+)
>>
>> diff --git a/drivers/clk/qcom/gcc-ipq9574.c
>> b/drivers/clk/qcom/gcc-ipq9574.c
>> index b2a2d618a5ec..1bf33d582dc2 100644
>> --- a/drivers/clk/qcom/gcc-ipq9574.c
>> +++ b/drivers/clk/qcom/gcc-ipq9574.c
>> @@ -1538,6 +1538,24 @@ static struct clk_regmap_phy_mux
>> pcie0_pipe_clk_src = {
>> },
>> };
>> +static struct clk_branch gcc_pcie0_pipe_clk = {
>> + .halt_reg = 0x28044,
>> + .halt_check = BRANCH_HALT_DELAY,
>> + .clkr = {
>> + .enable_reg = 0x28044,
>> + .enable_mask = BIT(0),
>> + .hw.init = &(struct clk_init_data){
>> + .name = "gcc_pcie0_pipe_clk",
>> + .parent_hws = (const struct clk_hw *[]) {
>> + &pcie0_pipe_clk_src.clkr.hw
>> + },
>> + .num_parents = 1,
>> + .flags = CLK_SET_RATE_PARENT,
>> + .ops = &clk_branch2_ops,
>> + },
>> + },
>> +};
>> +
>
> Also, this patch should come before your phy driver updates.
Sure got it, will reorder the patches in V2
>
> Regards,
> Sricharan
>
Best Regards,
Devi Priya
next prev parent reply other threads:[~2023-02-20 13:45 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-14 16:41 [PATCH 0/7] Add PCIe support for IPQ9574 Devi Priya
2023-02-14 16:41 ` [PATCH 1/7] dt-bindings: PCI: qcom: Add IPQ9574 specific compatible Devi Priya
2023-02-16 10:29 ` Krzysztof Kozlowski
2023-02-20 13:29 ` Devi Priya
2023-02-24 8:23 ` Manivannan Sadhasivam
2023-02-28 5:26 ` Devi Priya
2023-02-28 6:33 ` Manivannan Sadhasivam
2023-03-03 15:16 ` Dmitry Baryshkov
2023-03-03 17:40 ` Manivannan Sadhasivam
2023-03-07 9:45 ` Devi Priya
2023-03-07 11:38 ` Dmitry Baryshkov
2023-03-07 12:56 ` Manivannan Sadhasivam
2023-03-07 14:40 ` Devi Priya
2023-03-07 14:56 ` Dmitry Baryshkov
2023-03-08 8:49 ` Devi Priya
2023-02-14 16:41 ` [PATCH 2/7] PCI: qcom: Add IPQ9574 PCIe support Devi Priya
2023-02-16 11:38 ` Sricharan Ramabadhran
2023-02-20 13:41 ` Devi Priya
2023-02-20 14:51 ` Kathiravan T
2023-02-20 15:25 ` Devi Priya
2023-02-24 8:29 ` Manivannan Sadhasivam
2023-02-28 5:28 ` Devi Priya
2023-02-14 16:41 ` [PATCH 3/7] dt-bindings: phy: qcom,qmp-pcie: Add ipq9574 compatible Devi Priya
2023-02-16 10:30 ` Krzysztof Kozlowski
2023-02-14 16:41 ` [PATCH 4/7] phy: qcom-qmp-pcie: Add support for IPQ9574 platform Devi Priya
2023-02-14 16:41 ` [PATCH 5/7] dt-bindings: clock: Add PCIe pipe clock definitions Devi Priya
2023-02-15 2:30 ` Stephen Boyd
2023-02-15 3:18 ` Devi Priya
2023-02-14 16:41 ` [PATCH 6/7] clk: qcom: gcc-ipq9574: Add PCIe related clocks Devi Priya
2023-02-17 8:41 ` Sricharan Ramabadhran
2023-02-20 13:43 ` Devi Priya
2023-02-17 8:43 ` Sricharan Ramabadhran
2023-02-20 13:44 ` Devi Priya [this message]
2023-02-14 16:41 ` [PATCH 7/7] arm64: dts: qcom: ipq9574: Add PCIe PHYs and controller nodes Devi Priya
2023-02-17 8:35 ` Sricharan Ramabadhran
2023-02-20 13:47 ` Devi Priya
2023-02-24 6:57 ` Kathiravan T
2023-03-03 12:09 ` Devi Priya
2023-02-24 8:59 ` Manivannan Sadhasivam
2023-03-07 14:42 ` Devi Priya
2023-02-17 8:48 ` [PATCH 0/7] Add PCIe support for IPQ9574 Sricharan Ramabadhran
2023-02-20 13:48 ` Devi Priya
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1ec15d17-9079-5577-757c-8113e394edef@quicinc.com \
--to=quic_devipriy@quicinc.com \
--cc=agross@kernel.org \
--cc=andersson@kernel.org \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=kishon@kernel.org \
--cc=konrad.dybcio@linaro.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=kw@linux.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=lpieralisi@kernel.org \
--cc=mani@kernel.org \
--cc=mturquette@baylibre.com \
--cc=p.zabel@pengutronix.de \
--cc=quic_anusha@quicinc.com \
--cc=quic_arajkuma@quicinc.com \
--cc=quic_gokulsri@quicinc.com \
--cc=quic_kathirav@quicinc.com \
--cc=quic_sjaganat@quicinc.com \
--cc=quic_srichara@quicinc.com \
--cc=robh@kernel.org \
--cc=sboyd@kernel.org \
--cc=svarbanov@mm-sol.com \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).