From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Jassi Brar <jassisinghbrar@gmail.com>
Cc: Andy Gross <andy.gross@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Ohad Ben-Cohen <ohad@wizery.com>,
linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
Devicetree List <devicetree@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-remoteproc@vger.kernel.org
Subject: Re: [PATCH v4 3/5] soc: qcom: Introduce APCS IPC driver
Date: Fri, 5 May 2017 11:37:29 -0700 [thread overview]
Message-ID: <20170505183729.GG15143@minitux> (raw)
In-Reply-To: <CABb+yY2P=qPTYB6PDkjV82Qc67Xzer40BHRsOQP2m-gM3eK_UA@mail.gmail.com>
On Fri 05 May 03:26 PDT 2017, Jassi Brar wrote:
> On Fri, May 5, 2017 at 1:35 AM, Bjorn Andersson
> <bjorn.andersson@linaro.org> wrote:
>
> > +
> > +static int qcom_apcs_ipc_send_data(struct mbox_chan *chan, void *data)
> > +{
> > + struct qcom_apcs_ipc *apcs = container_of(chan->mbox,
> > + struct qcom_apcs_ipc, mbox);
> > + unsigned long idx = (unsigned long)chan->con_priv;
> > +
> > + writel(BIT(idx), apcs->base + apcs->offset);
> > +
> When/how does this bit get ever cleared again?
> You may want to add last_tx_done() callback to check if this bit is
> cleared before you can send the next interrupt. And set
> txdone_poll/irq accordingly.
>
It's a write-only register, writing a bit fires off an edge triggered
interrupt on the specific remote processor, which will ack the
associated IRQ status and handle the interrupt.
As the "message" is just a notification to the other side that it needs
to act on "something", there's no harm in notifying it multiple times
before it has a chance to ack the IRQ and a write after that will be
seen as a separate interrupt.
Regards,
Bjorn
next prev parent reply other threads:[~2017-05-05 18:37 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-04 20:05 [PATCH v4 1/5] mailbox: Make startup and shutdown ops optional Bjorn Andersson
2017-05-04 20:05 ` [PATCH v4 2/5] dt-bindings: mailbox: Introduce Qualcomm APCS global binding Bjorn Andersson
2017-05-04 20:05 ` [PATCH v4 3/5] soc: qcom: Introduce APCS IPC driver Bjorn Andersson
2017-05-05 10:26 ` Jassi Brar
2017-05-05 18:37 ` Bjorn Andersson [this message]
2017-05-05 19:22 ` Jassi Brar
[not found] ` <CABb+yY03imq8911rF9dHJjG_a_aosksA=tgk7Rog5AZSezHDyg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-05-05 19:53 ` Jeffrey Hugo
2017-05-05 20:22 ` Jassi Brar
2017-05-05 20:39 ` Jeffrey Hugo
[not found] ` <CABb+yY1K3Hyn7CzQCA6tHu-KrPigARc3cYgBdT8PNX7vjhPK0g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-05-06 1:19 ` Bjorn Andersson
2017-05-06 4:48 ` Jassi Brar
2017-05-08 5:54 ` Bjorn Andersson
2017-05-08 6:47 ` Jassi Brar
2017-05-08 19:11 ` Bjorn Andersson
2017-05-09 16:41 ` Jassi Brar
[not found] ` <CABb+yY2uC6vNFTq1KtZwrrw8x4BEfc2cMjF5DwrLbGpYWBNBzQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-05-09 19:11 ` Bjorn Andersson
2017-05-10 2:33 ` Jassi Brar
2017-05-10 19:00 ` Bjorn Andersson
2017-05-11 2:07 ` Jassi Brar
2017-05-12 22:48 ` Bjorn Andersson
2017-05-16 11:25 ` Jassi Brar
2017-05-04 20:05 ` [PATCH v4 4/5] soc: qcom: Add device tree binding for GLINK RPM Bjorn Andersson
2017-05-08 17:06 ` Rob Herring
2017-05-08 17:53 ` Bjorn Andersson
2017-05-04 20:05 ` [PATCH v4 5/5] rpmsg: Introduce Qualcomm RPM glink driver Bjorn Andersson
[not found] ` <20170504200539.27027-1-bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2017-05-05 9:35 ` [PATCH v4 1/5] mailbox: Make startup and shutdown ops optional Sudeep Holla
2017-05-05 10:33 ` Jassi Brar
2017-05-05 18:21 ` Bjorn Andersson
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