From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lina Iyer Subject: [PATCH v2 0/8] qcom: support wakeup capable GPIOs Date: Thu, 24 Jan 2019 13:21:57 -0700 Message-ID: <20190124202205.7940-1-ilina@codeaurora.org> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Return-path: Sender: linux-kernel-owner@vger.kernel.org To: swboyd@chromium.org, evgreen@chromium.org, marc.zyngier@arm.com Cc: linux-kernel@vger.kernel.org, rplsssn@codeaurora.org, linux-arm-msm@vger.kernel.org, thierry.reding@gmail.com, bjorn.andersson@linaro.org, dianders@chromium.org, linus.walleij@linaro.org, Lina Iyer List-Id: linux-arm-msm@vger.kernel.org Hi all, This is a bug fix submission of the v1 posted here [1]. The discussion on how to represent the wakeup-parent interrupt controller is on-going [2] here. The reiew comments in [1], from Doug and Stephen are addressed in this patch. The series attempts to add GPIO chip in hierarchy with PDC interrupt controller that can detect and wakeup the GPIOs routed to it, when the system is suspend/deep sleep mode. Changes in v2: - Fix bug related to unmasking PDC interrupt - Address review comments from Doug and Stepehn - Rebase on top of 5.0-rc2 - Fix signed-off-by tags - Enable QCOM_PDC in defconfig Do note that this patch uses the register address convention updated by Bjorn per [3]. Thanks, Lina [1]. https://lkml.org/lkml/2018/12/19/807 [2]. https://lkml.org/lkml/2018/12/19/813 [3]. https://lkml.org/lkml/2019/1/17/924 Lina Iyer (7): irqdomain: add bus token DOMAIN_BUS_WAKEUP drivers: irqchip: add PDC irqdomain for wakeup capable GPIOs dt-bindings: sdm845-pinctrl: add wakeup interrupt parent for GPIO drivers: pinctrl: msm: setup GPIO irqchip hierarchy arm64: dts: qcom: add PDC interrupt controller for SDM845 arm64: dts: qcom: setup PDC as wakeup parent for GPIOs for SDM845 arm64: defconfig: enable PDC interrupt controller for Qualcomm SDM845 Thierry Reding (1): gpio: Add support for hierarchical IRQ domains .../bindings/pinctrl/qcom,sdm845-pinctrl.txt | 7 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 + arch/arm64/configs/defconfig | 1 + drivers/gpio/gpiolib.c | 15 +- drivers/irqchip/qcom-pdc.c | 204 +++++++++++++++++- drivers/pinctrl/qcom/pinctrl-msm.c | 133 ++++++++++-- include/linux/gpio/driver.h | 6 + include/linux/irqdomain.h | 1 + include/linux/soc/qcom/irq.h | 23 ++ 9 files changed, 371 insertions(+), 29 deletions(-) create mode 100644 include/linux/soc/qcom/irq.h -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project