* [PATCH 0/3] ADD interconnect support for USB
@ 2019-09-11 4:54 Chandana Kishori Chiluveru
2019-09-11 4:54 ` [PATCH 1/3] dt-bindings: Introduce interconnect bindings for usb Chandana Kishori Chiluveru
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Chandana Kishori Chiluveru @ 2019-09-11 4:54 UTC (permalink / raw)
To: balbi, agross, david.brown
Cc: linux-usb, linux-arm-msm, Chandana Kishori Chiluveru
This path series aims to add interconnect support in
dwc3-qcom driver on SDM845 SoCs.
Chandana Kishori Chiluveru (3):
dt-bindings: Introduce interconnect bindings for usb
usb: dwc3: qcom: Add interconnect support in dwc3 driver
arm64: dts: sdm845: Add interconnect properties for USB
.../devicetree/bindings/usb/qcom,dwc3.txt | 13 ++
arch/arm64/boot/dts/qcom/sdm845.dtsi | 12 ++
drivers/usb/dwc3/dwc3-qcom.c | 147 ++++++++++++++++++++-
3 files changed, 170 insertions(+), 2 deletions(-)
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 1/3] dt-bindings: Introduce interconnect bindings for usb 2019-09-11 4:54 [PATCH 0/3] ADD interconnect support for USB Chandana Kishori Chiluveru @ 2019-09-11 4:54 ` Chandana Kishori Chiluveru 2019-09-16 21:19 ` Matthias Kaehlcke 2019-09-11 4:54 ` [PATCH 2/3] usb: dwc3: qcom: Add interconnect support in dwc3 driver Chandana Kishori Chiluveru 2019-09-11 4:54 ` [PATCH 3/3] arm64: dts: sdm845: Add interconnect properties for USB Chandana Kishori Chiluveru 2 siblings, 1 reply; 6+ messages in thread From: Chandana Kishori Chiluveru @ 2019-09-11 4:54 UTC (permalink / raw) To: balbi, agross, david.brown Cc: linux-usb, linux-arm-msm, Chandana Kishori Chiluveru Add documentation for the interconnects and interconnect-names bindings for USB as detailed by bindings/interconnect/interconnect.txt. Signed-off-by: Chandana Kishori Chiluveru <cchiluve@codeaurora.org> --- Documentation/devicetree/bindings/usb/qcom,dwc3.txt | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.txt b/Documentation/devicetree/bindings/usb/qcom,dwc3.txt index cb695aa..7e9cb97 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.txt +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.txt @@ -33,6 +33,16 @@ Optional clocks: Optional properties: - resets: Phandle to reset control that resets core and wrapper. +- interconnects: Pairs of phandles and interconnect provider specifier + to denote the edge source and destination ports of + the interconnect path. Please refer to + Documentation/devicetree/bindings/interconnect/ + for more details. +- interconnect-names: List of interconnect path name strings sorted in the same + order as the interconnects property. Consumers drivers will use + interconnect-names to match interconnect paths with interconnect + specifiers. Please refer to Documentation/devicetree/bindings/ + interconnect/ for more details. - interrupts: specifies interrupts from controller wrapper used to wakeup from low power/susepnd state. Must contain one or more entry for interrupt-names property @@ -74,6 +84,9 @@ Example device nodes: #size-cells = <1>; ranges; + interconnects = <&qnoc MASTER_USB3_0 &qnoc SLAVE_EBI1>, + <&qnoc MASTER_APPSS_PROC &qnoc SLAVE_USB3_0>; + interconnect-names = "usb-ddr", "apps-usb"; interrupts = <0 131 0>, <0 486 0>, <0 488 0>, <0 489 0>; interrupt-names = "hs_phy_irq", "ss_phy_irq", "dm_hs_phy_irq", "dp_hs_phy_irq"; -- Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project. ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/3] dt-bindings: Introduce interconnect bindings for usb 2019-09-11 4:54 ` [PATCH 1/3] dt-bindings: Introduce interconnect bindings for usb Chandana Kishori Chiluveru @ 2019-09-16 21:19 ` Matthias Kaehlcke 0 siblings, 0 replies; 6+ messages in thread From: Matthias Kaehlcke @ 2019-09-16 21:19 UTC (permalink / raw) To: Chandana Kishori Chiluveru Cc: balbi, agross, david.brown, linux-usb, linux-arm-msm On Wed, Sep 11, 2019 at 10:24:33AM +0530, Chandana Kishori Chiluveru wrote: > Add documentation for the interconnects and interconnect-names > bindings for USB as detailed by bindings/interconnect/interconnect.txt. This isn't a generic binding for USB, but for the qcom,dwc3, the commit message (including subject) should reflect this. nit: you might want to replace 'bindings' with 'properties'. > Signed-off-by: Chandana Kishori Chiluveru <cchiluve@codeaurora.org> > --- > Documentation/devicetree/bindings/usb/qcom,dwc3.txt | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.txt b/Documentation/devicetree/bindings/usb/qcom,dwc3.txt > index cb695aa..7e9cb97 100644 > --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.txt > +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.txt > @@ -33,6 +33,16 @@ Optional clocks: > > Optional properties: > - resets: Phandle to reset control that resets core and wrapper. > +- interconnects: Pairs of phandles and interconnect provider specifier consistency nit: should be either 'phandle' & 'specifier' or 'phandles' & 'specifiers'. ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 2/3] usb: dwc3: qcom: Add interconnect support in dwc3 driver 2019-09-11 4:54 [PATCH 0/3] ADD interconnect support for USB Chandana Kishori Chiluveru 2019-09-11 4:54 ` [PATCH 1/3] dt-bindings: Introduce interconnect bindings for usb Chandana Kishori Chiluveru @ 2019-09-11 4:54 ` Chandana Kishori Chiluveru 2019-09-12 12:54 ` Georgi Djakov 2019-09-11 4:54 ` [PATCH 3/3] arm64: dts: sdm845: Add interconnect properties for USB Chandana Kishori Chiluveru 2 siblings, 1 reply; 6+ messages in thread From: Chandana Kishori Chiluveru @ 2019-09-11 4:54 UTC (permalink / raw) To: balbi, agross, david.brown Cc: linux-usb, linux-arm-msm, Chandana Kishori Chiluveru Add interconnect support in dwc3-qcom driver to vote for bus bandwidth. This requires for two different paths - from USB master to DDR slave. The other is from APPS master to USB slave. Signed-off-by: Chandana Kishori Chiluveru <cchiluve@codeaurora.org> --- drivers/usb/dwc3/dwc3-qcom.c | 147 ++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 145 insertions(+), 2 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index 184df4d..4b8c2ae 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -14,6 +14,7 @@ #include <linux/extcon.h> #include <linux/of_platform.h> #include <linux/platform_device.h> +#include <linux/interconnect.h> #include <linux/phy/phy.h> #include <linux/usb/of.h> #include <linux/reset.h> @@ -38,6 +39,9 @@ #define PWR_EVNT_LPM_IN_L2_MASK BIT(4) #define PWR_EVNT_LPM_OUT_L2_MASK BIT(5) +#define USB_DDR "usb-ddr" +#define APPS_USB "apps-usb" + struct dwc3_qcom { struct device *dev; void __iomem *qscratch_base; @@ -59,8 +63,13 @@ struct dwc3_qcom { enum usb_dr_mode mode; bool is_suspended; bool pm_suspended; + struct icc_path *usb_ddr_icc_path; + struct icc_path *apps_usb_icc_path; }; +static int usb_interconnect_enable(struct dwc3_qcom *qcom); +static int usb_interconnect_disable(struct dwc3_qcom *qcom); + static inline void dwc3_qcom_setbits(void __iomem *base, u32 offset, u32 val) { u32 reg; @@ -222,7 +231,7 @@ static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom) static int dwc3_qcom_suspend(struct dwc3_qcom *qcom) { u32 val; - int i; + int i, ret; if (qcom->is_suspended) return 0; @@ -234,6 +243,11 @@ static int dwc3_qcom_suspend(struct dwc3_qcom *qcom) for (i = qcom->num_clocks - 1; i >= 0; i--) clk_disable_unprepare(qcom->clks[i]); + /* Remove bus voting */ + ret = usb_interconnect_disable(qcom); + if (ret) + dev_err(qcom->dev, "bus bw voting failed %d\n", ret); + qcom->is_suspended = true; dwc3_qcom_enable_interrupts(qcom); @@ -259,6 +273,11 @@ static int dwc3_qcom_resume(struct dwc3_qcom *qcom) } } + /* Add bus voting */ + ret = usb_interconnect_enable(qcom); + if (ret) + dev_err(qcom->dev, "bus bw voting failed %d\n", ret); + /* Clear existing events from PHY related to L2 in/out */ dwc3_qcom_setbits(qcom->qscratch_base, PWR_EVNT_IRQ_STAT_REG, PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK); @@ -409,6 +428,116 @@ static int dwc3_qcom_clk_init(struct dwc3_qcom *qcom, int count) return 0; } +/* Interconnect path bandwidths in KBps */ +#define USB_MEMORY_AVG_HS_BW 240000 +#define USB_MEMORY_PEAK_HS_BW 700000 +#define USB_MEMORY_AVG_SS_BW 1000000 +#define USB_MEMORY_PEAK_SS_BW 2500000 +#define APPS_USB_AVG_BW 0 +#define APPS_USB_PEAK_BW 40000 + +/** + * usb_interconnect_init() - Request to get interconnect path handle + * @qcom: Pointer to the concerned usb core. + * + */ +static int usb_interconnect_init(struct dwc3_qcom *qcom) +{ + struct device *dev = qcom->dev; + + qcom->usb_ddr_icc_path = of_icc_get(dev, USB_DDR); + if (IS_ERR(qcom->usb_ddr_icc_path)) { + dev_err(dev, "Error: (%ld) failed getting %s path\n", + PTR_ERR(qcom->usb_ddr_icc_path), USB_DDR); + return PTR_ERR(qcom->usb_ddr_icc_path); + } + + qcom->apps_usb_icc_path = of_icc_get(dev, APPS_USB); + if (IS_ERR(qcom->apps_usb_icc_path)) { + dev_err(dev, "Error: (%ld) failed getting %s path\n", + PTR_ERR(qcom->apps_usb_icc_path), APPS_USB); + return PTR_ERR(qcom->usb_ddr_icc_path); + } + + return 0; +} + +/** + * geni_interconnect_exit() - Request to release interconnect path handle + * @qcom: Pointer to the concerned usb core. + * + * This function is used to release interconnect path handle. + */ +static void usb_interconnect_exit(struct dwc3_qcom *qcom) +{ + icc_put(qcom->usb_ddr_icc_path); + icc_put(qcom->apps_usb_icc_path); +} + +/* Currently we only use bandwidth level, so just "enable" interconnects */ +static int usb_interconnect_enable(struct dwc3_qcom *qcom) +{ + struct dwc3 *dwc; + int ret; + + dwc = platform_get_drvdata(qcom->dwc3); + if (!dwc) { + dev_err(qcom->dev, "Failed to get dwc3 device\n"); + return -EPROBE_DEFER; + } + + if (dwc->maximum_speed == USB_SPEED_SUPER) { + ret = icc_set_bw(qcom->usb_ddr_icc_path, + USB_MEMORY_AVG_SS_BW, USB_MEMORY_PEAK_SS_BW); + if (ret) + return ret; + } else { + ret = icc_set_bw(qcom->usb_ddr_icc_path, + USB_MEMORY_AVG_HS_BW, USB_MEMORY_PEAK_HS_BW); + if (ret) + return ret; + } + + ret = icc_set_bw(qcom->apps_usb_icc_path, + APPS_USB_AVG_BW, APPS_USB_PEAK_BW); + if (ret) + goto err_disable_mem_path; + + return 0; + +err_disable_mem_path: + icc_set_bw(qcom->usb_ddr_icc_path, 0, 0); + + return ret; +} + +/* To disable an interconnect, we just its bandwidth to 0 */ +static int usb_interconnect_disable(struct dwc3_qcom *qcom) +{ + struct dwc3 *dwc = platform_get_drvdata(qcom->dwc3); + int ret; + + ret = icc_set_bw(qcom->usb_ddr_icc_path, 0, 0); + if (ret) + return ret; + + ret = icc_set_bw(qcom->apps_usb_icc_path, 0, 0); + if (ret) + goto err_reenable_memory_path; + + return 0; /* Success */ + + /* Re-enable things in the event of an error */ +err_reenable_memory_path: + if (dwc->maximum_speed == USB_SPEED_SUPER) + icc_set_bw(qcom->usb_ddr_icc_path, + USB_MEMORY_AVG_SS_BW, USB_MEMORY_PEAK_SS_BW); + else + icc_set_bw(qcom->usb_ddr_icc_path, + USB_MEMORY_AVG_HS_BW, USB_MEMORY_PEAK_HS_BW); + + return ret; +} static int dwc3_qcom_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node, *dwc3_np; @@ -494,6 +623,17 @@ static int dwc3_qcom_probe(struct platform_device *pdev) goto depopulate; } + ret = usb_interconnect_init(qcom); + if (ret) { + dev_err(dev, "failed to get interconnect handle ret:%d\n", ret); + goto depopulate; + } + ret = usb_interconnect_enable(qcom); + if (ret) { + dev_err(qcom->dev, "bus bw voting failed %d\n", ret); + goto interconnect_exit; + } + qcom->mode = usb_get_dr_mode(&qcom->dwc3->dev); /* enable vbus override for device mode */ @@ -503,7 +643,7 @@ static int dwc3_qcom_probe(struct platform_device *pdev) /* register extcon to override sw_vbus on Vbus change later */ ret = dwc3_qcom_register_extcon(qcom); if (ret) - goto depopulate; + goto interconnect_exit; device_init_wakeup(&pdev->dev, 1); qcom->is_suspended = false; @@ -513,6 +653,8 @@ static int dwc3_qcom_probe(struct platform_device *pdev) return 0; +interconnect_exit: + usb_interconnect_exit(qcom); depopulate: of_platform_depopulate(&pdev->dev); clk_disable: @@ -540,6 +682,7 @@ static int dwc3_qcom_remove(struct platform_device *pdev) } qcom->num_clocks = 0; + usb_interconnect_exit(qcom); reset_control_assert(qcom->resets); pm_runtime_allow(dev); -- Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project. ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 2/3] usb: dwc3: qcom: Add interconnect support in dwc3 driver 2019-09-11 4:54 ` [PATCH 2/3] usb: dwc3: qcom: Add interconnect support in dwc3 driver Chandana Kishori Chiluveru @ 2019-09-12 12:54 ` Georgi Djakov 0 siblings, 0 replies; 6+ messages in thread From: Georgi Djakov @ 2019-09-12 12:54 UTC (permalink / raw) To: Chandana Kishori Chiluveru, balbi, agross Cc: david.brown, linux-usb, linux-arm-msm Hi Chandana, Thank you for the patch! On 9/11/19 07:54, Chandana Kishori Chiluveru wrote: > Add interconnect support in dwc3-qcom driver to vote for bus > bandwidth. > > This requires for two different paths - from USB master to > DDR slave. The other is from APPS master to USB slave. > > Signed-off-by: Chandana Kishori Chiluveru <cchiluve@codeaurora.org> > --- > drivers/usb/dwc3/dwc3-qcom.c | 147 ++++++++++++++++++++++++++++++++++++++++++- > 1 file changed, 145 insertions(+), 2 deletions(-) > > diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c > index 184df4d..4b8c2ae 100644 > --- a/drivers/usb/dwc3/dwc3-qcom.c > +++ b/drivers/usb/dwc3/dwc3-qcom.c > @@ -14,6 +14,7 @@ > #include <linux/extcon.h> > #include <linux/of_platform.h> > #include <linux/platform_device.h> > +#include <linux/interconnect.h> > #include <linux/phy/phy.h> > #include <linux/usb/of.h> > #include <linux/reset.h> > @@ -38,6 +39,9 @@ > #define PWR_EVNT_LPM_IN_L2_MASK BIT(4) > #define PWR_EVNT_LPM_OUT_L2_MASK BIT(5) > > +#define USB_DDR "usb-ddr" > +#define APPS_USB "apps-usb" What is the benefit of adding these defines? Please remove them. > struct dwc3_qcom { > struct device *dev; > void __iomem *qscratch_base; > @@ -59,8 +63,13 @@ struct dwc3_qcom { > enum usb_dr_mode mode; > bool is_suspended; > bool pm_suspended; > + struct icc_path *usb_ddr_icc_path; > + struct icc_path *apps_usb_icc_path; Nit: Maybe try to make the indentation style consistent with the existing code? > }; > > +static int usb_interconnect_enable(struct dwc3_qcom *qcom); > +static int usb_interconnect_disable(struct dwc3_qcom *qcom); > + > static inline void dwc3_qcom_setbits(void __iomem *base, u32 offset, u32 val) > { > u32 reg; > @@ -222,7 +231,7 @@ static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom) > static int dwc3_qcom_suspend(struct dwc3_qcom *qcom) > { > u32 val; > - int i; > + int i, ret; > > if (qcom->is_suspended) > return 0; > @@ -234,6 +243,11 @@ static int dwc3_qcom_suspend(struct dwc3_qcom *qcom) > for (i = qcom->num_clocks - 1; i >= 0; i--) > clk_disable_unprepare(qcom->clks[i]); > > + /* Remove bus voting */ > + ret = usb_interconnect_disable(qcom); > + if (ret) > + dev_err(qcom->dev, "bus bw voting failed %d\n", ret); > + > qcom->is_suspended = true; > dwc3_qcom_enable_interrupts(qcom); > > @@ -259,6 +273,11 @@ static int dwc3_qcom_resume(struct dwc3_qcom *qcom) > } > } > > + /* Add bus voting */ > + ret = usb_interconnect_enable(qcom); > + if (ret) > + dev_err(qcom->dev, "bus bw voting failed %d\n", ret); > + > /* Clear existing events from PHY related to L2 in/out */ > dwc3_qcom_setbits(qcom->qscratch_base, PWR_EVNT_IRQ_STAT_REG, > PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK); > @@ -409,6 +428,116 @@ static int dwc3_qcom_clk_init(struct dwc3_qcom *qcom, int count) > return 0; > } > > +/* Interconnect path bandwidths in KBps */ > +#define USB_MEMORY_AVG_HS_BW 240000 > +#define USB_MEMORY_PEAK_HS_BW 700000 > +#define USB_MEMORY_AVG_SS_BW 1000000 > +#define USB_MEMORY_PEAK_SS_BW 2500000 > +#define APPS_USB_AVG_BW 0 > +#define APPS_USB_PEAK_BW 40000 I would suggest to wrap the values with kBps_to_icc() or MBps_to_icc() macro. > + > +/** > + * usb_interconnect_init() - Request to get interconnect path handle > + * @qcom: Pointer to the concerned usb core. > + * > + */ > +static int usb_interconnect_init(struct dwc3_qcom *qcom) > +{ > + struct device *dev = qcom->dev; > + > + qcom->usb_ddr_icc_path = of_icc_get(dev, USB_DDR); > + if (IS_ERR(qcom->usb_ddr_icc_path)) { > + dev_err(dev, "Error: (%ld) failed getting %s path\n", > + PTR_ERR(qcom->usb_ddr_icc_path), USB_DDR); > + return PTR_ERR(qcom->usb_ddr_icc_path); > + } > + > + qcom->apps_usb_icc_path = of_icc_get(dev, APPS_USB); > + if (IS_ERR(qcom->apps_usb_icc_path)) { > + dev_err(dev, "Error: (%ld) failed getting %s path\n", > + PTR_ERR(qcom->apps_usb_icc_path), APPS_USB); > + return PTR_ERR(qcom->usb_ddr_icc_path); > + } > + > + return 0; > +} > + > +/** > + * geni_interconnect_exit() - Request to release interconnect path handle > + * @qcom: Pointer to the concerned usb core. > + * > + * This function is used to release interconnect path handle. > + */ > +static void usb_interconnect_exit(struct dwc3_qcom *qcom) > +{ > + icc_put(qcom->usb_ddr_icc_path); > + icc_put(qcom->apps_usb_icc_path); > +} > + > +/* Currently we only use bandwidth level, so just "enable" interconnects */ > +static int usb_interconnect_enable(struct dwc3_qcom *qcom) > +{ > + struct dwc3 *dwc; > + int ret; > + > + dwc = platform_get_drvdata(qcom->dwc3); > + if (!dwc) { > + dev_err(qcom->dev, "Failed to get dwc3 device\n"); > + return -EPROBE_DEFER; > + } > + > + if (dwc->maximum_speed == USB_SPEED_SUPER) { > + ret = icc_set_bw(qcom->usb_ddr_icc_path, > + USB_MEMORY_AVG_SS_BW, USB_MEMORY_PEAK_SS_BW); > + if (ret) > + return ret; > + } else { > + ret = icc_set_bw(qcom->usb_ddr_icc_path, > + USB_MEMORY_AVG_HS_BW, USB_MEMORY_PEAK_HS_BW); > + if (ret) > + return ret; > + } > + > + ret = icc_set_bw(qcom->apps_usb_icc_path, > + APPS_USB_AVG_BW, APPS_USB_PEAK_BW); > + if (ret) > + goto err_disable_mem_path; > + > + return 0; > + > +err_disable_mem_path: > + icc_set_bw(qcom->usb_ddr_icc_path, 0, 0); > + > + return ret; > +} > + > +/* To disable an interconnect, we just its bandwidth to 0 */ Missing the word "set"? > +static int usb_interconnect_disable(struct dwc3_qcom *qcom) > +{ > + struct dwc3 *dwc = platform_get_drvdata(qcom->dwc3); > + int ret; > + > + ret = icc_set_bw(qcom->usb_ddr_icc_path, 0, 0); > + if (ret) > + return ret; > + > + ret = icc_set_bw(qcom->apps_usb_icc_path, 0, 0); > + if (ret) > + goto err_reenable_memory_path; > + > + return 0; /* Success */ Nit: This comment seems useless. > + > + /* Re-enable things in the event of an error */ > +err_reenable_memory_path: > + if (dwc->maximum_speed == USB_SPEED_SUPER) > + icc_set_bw(qcom->usb_ddr_icc_path, > + USB_MEMORY_AVG_SS_BW, USB_MEMORY_PEAK_SS_BW); > + else > + icc_set_bw(qcom->usb_ddr_icc_path, > + USB_MEMORY_AVG_HS_BW, USB_MEMORY_PEAK_HS_BW); > + > + return ret; > +} > static int dwc3_qcom_probe(struct platform_device *pdev) > { > struct device_node *np = pdev->dev.of_node, *dwc3_np; > @@ -494,6 +623,17 @@ static int dwc3_qcom_probe(struct platform_device *pdev) > goto depopulate; > } > > + ret = usb_interconnect_init(qcom); > + if (ret) { > + dev_err(dev, "failed to get interconnect handle ret:%d\n", ret); > + goto depopulate; > + } > + ret = usb_interconnect_enable(qcom); > + if (ret) { > + dev_err(qcom->dev, "bus bw voting failed %d\n", ret); > + goto interconnect_exit; > + } > + > qcom->mode = usb_get_dr_mode(&qcom->dwc3->dev); > > /* enable vbus override for device mode */ > @@ -503,7 +643,7 @@ static int dwc3_qcom_probe(struct platform_device *pdev) > /* register extcon to override sw_vbus on Vbus change later */ > ret = dwc3_qcom_register_extcon(qcom); > if (ret) > - goto depopulate; > + goto interconnect_exit; > > device_init_wakeup(&pdev->dev, 1); > qcom->is_suspended = false; > @@ -513,6 +653,8 @@ static int dwc3_qcom_probe(struct platform_device *pdev) > > return 0; > > +interconnect_exit: > + usb_interconnect_exit(qcom); > depopulate: > of_platform_depopulate(&pdev->dev); > clk_disable: > @@ -540,6 +682,7 @@ static int dwc3_qcom_remove(struct platform_device *pdev) > } > qcom->num_clocks = 0; > > + usb_interconnect_exit(qcom); > reset_control_assert(qcom->resets); > > pm_runtime_allow(dev); > The patch looks ok, but does not apply to neither mainline or linux-next. Thanks, Georgi ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 3/3] arm64: dts: sdm845: Add interconnect properties for USB 2019-09-11 4:54 [PATCH 0/3] ADD interconnect support for USB Chandana Kishori Chiluveru 2019-09-11 4:54 ` [PATCH 1/3] dt-bindings: Introduce interconnect bindings for usb Chandana Kishori Chiluveru 2019-09-11 4:54 ` [PATCH 2/3] usb: dwc3: qcom: Add interconnect support in dwc3 driver Chandana Kishori Chiluveru @ 2019-09-11 4:54 ` Chandana Kishori Chiluveru 2 siblings, 0 replies; 6+ messages in thread From: Chandana Kishori Chiluveru @ 2019-09-11 4:54 UTC (permalink / raw) To: balbi, agross, david.brown Cc: linux-usb, linux-arm-msm, Chandana Kishori Chiluveru Populate USB DT node with interconnect properties. Signed-off-by: Chandana Kishori Chiluveru <cchiluve@codeaurora.org> --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index fcb9330..1c41922 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -1837,6 +1837,12 @@ resets = <&gcc GCC_USB30_PRIM_BCR>; + interconnects = <&rsc_hlos MASTER_USB3_0 + &rsc_hlos SLAVE_EBI1>, + <&rsc_hlos MASTER_APPSS_PROC + &rsc_hlos SLAVE_USB3_0>; + interconnect-names = "usb-ddr", "apps-usb"; + usb_1_dwc3: dwc3@a600000 { compatible = "snps,dwc3"; reg = <0 0x0a600000 0 0xcd00>; @@ -1881,6 +1887,12 @@ resets = <&gcc GCC_USB30_SEC_BCR>; + interconnects = <&rsc_hlos MASTER_USB3_1 + &rsc_hlos SLAVE_EBI1>, + <&rsc_hlos MASTER_APPSS_PROC + &rsc_hlos SLAVE_USB3_1>; + interconnect-names = "usb-ddr", "apps-usb"; + usb_2_dwc3: dwc3@a800000 { compatible = "snps,dwc3"; reg = <0 0x0a800000 0 0xcd00>; -- Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project. ^ permalink raw reply related [flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-09-16 21:19 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-09-11 4:54 [PATCH 0/3] ADD interconnect support for USB Chandana Kishori Chiluveru 2019-09-11 4:54 ` [PATCH 1/3] dt-bindings: Introduce interconnect bindings for usb Chandana Kishori Chiluveru 2019-09-16 21:19 ` Matthias Kaehlcke 2019-09-11 4:54 ` [PATCH 2/3] usb: dwc3: qcom: Add interconnect support in dwc3 driver Chandana Kishori Chiluveru 2019-09-12 12:54 ` Georgi Djakov 2019-09-11 4:54 ` [PATCH 3/3] arm64: dts: sdm845: Add interconnect properties for USB Chandana Kishori Chiluveru
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