From: kholk11@gmail.com
To: linux-arm-msm@vger.kernel.org
Cc: kholk11@gmail.com, marijns95@gmail.com, robdclark@gmail.com,
sean@poorly.run, airlied@linux.ie, daniel@ffwll.ch,
robh+dt@kernel.org, mark.rutland@arm.com, tglx@linutronix.de,
jonathan@marek.ca, bjorn.andersson@linaro.org,
georgi.djakov@linaro.org, gregkh@linuxfoundation.org,
dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org
Subject: [PATCH v3 1/7] drm/msm/mdp5: Add optional TBU and TBU_RT clocks
Date: Tue, 15 Oct 2019 12:10:52 +0200 [thread overview]
Message-ID: <20191015101058.37157-2-kholk11@gmail.com> (raw)
In-Reply-To: <20191015101058.37157-1-kholk11@gmail.com>
From: AngeloGioacchino Del Regno <kholk11@gmail.com>
Some SoCs, like MSM8956/8976 (and APQ variants), do feature these
clocks and we need to enable them in order to get both of the
hw (mdp5/rot) Translation Buffer Units (TBUs) to properly work.
Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com>
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 10 ++++++++++
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h | 2 ++
2 files changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
index 5476892a335f..e43ecd4be10a 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
@@ -309,6 +309,10 @@ int mdp5_disable(struct mdp5_kms *mdp5_kms)
mdp5_kms->enable_count--;
WARN_ON(mdp5_kms->enable_count < 0);
+ if (mdp5_kms->tbu_rt_clk)
+ clk_disable_unprepare(mdp5_kms->tbu_rt_clk);
+ if (mdp5_kms->tbu_clk)
+ clk_disable_unprepare(mdp5_kms->tbu_clk);
clk_disable_unprepare(mdp5_kms->ahb_clk);
clk_disable_unprepare(mdp5_kms->axi_clk);
clk_disable_unprepare(mdp5_kms->core_clk);
@@ -329,6 +333,10 @@ int mdp5_enable(struct mdp5_kms *mdp5_kms)
clk_prepare_enable(mdp5_kms->core_clk);
if (mdp5_kms->lut_clk)
clk_prepare_enable(mdp5_kms->lut_clk);
+ if (mdp5_kms->tbu_clk)
+ clk_prepare_enable(mdp5_kms->tbu_clk);
+ if (mdp5_kms->tbu_rt_clk)
+ clk_prepare_enable(mdp5_kms->tbu_rt_clk);
return 0;
}
@@ -965,6 +973,8 @@ static int mdp5_init(struct platform_device *pdev, struct drm_device *dev)
/* optional clocks: */
get_clk(pdev, &mdp5_kms->lut_clk, "lut", false);
+ get_clk(pdev, &mdp5_kms->tbu_clk, "tbu", false);
+ get_clk(pdev, &mdp5_kms->tbu_rt_clk, "tbu_rt", false);
/* we need to set a default rate before enabling. Set a safe
* rate first, then figure out hw revision, and then set a
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h
index d1bf4fdfc815..128866742593 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h
@@ -53,6 +53,8 @@ struct mdp5_kms {
struct clk *ahb_clk;
struct clk *core_clk;
struct clk *lut_clk;
+ struct clk *tbu_clk;
+ struct clk *tbu_rt_clk;
struct clk *vsync_clk;
/*
--
2.21.0
next prev parent reply other threads:[~2019-10-15 10:11 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-15 10:10 [PATCH v3 0/7] DRM/MSM: Add support for MSM8956 and Adreno 510 kholk11
2019-10-15 10:10 ` kholk11 [this message]
2019-10-15 10:10 ` [PATCH v3 2/7] dt-bindings: msm/mdp5: Document optional TBU and TBU_RT clocks kholk11
2019-10-15 10:10 ` [PATCH v3 3/7] drm/msm/mdp5: Add configuration for msm8x76 kholk11
2019-10-15 10:10 ` [PATCH v3 4/7] drm/msm/dsi: Add configuration for 28nm PLL on family B kholk11
2019-10-15 10:10 ` [PATCH v3 5/7] dt-bindings: msm/dsi: Add 28nm PLL for family B compatible kholk11
2019-10-15 10:10 ` [PATCH v3 6/7] drm/msm/dsi: Add configuration for 8x76 kholk11
2019-10-15 10:10 ` [PATCH v3 7/7] drm/msm/adreno: Add support for Adreno 510 GPU kholk11
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