From: Douglas Anderson <dianders@chromium.org>
To: Rob Herring <robh@kernel.org>, Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Stephen Boyd <sboyd@kernel.org>
Cc: Jeffrey Hugo <jhugo@codeaurora.org>,
Taniya Das <tdas@codeaurora.org>,
jeffrey.l.hugo@gmail.com, linux-arm-msm@vger.kernel.org,
harigovi@codeaurora.org, devicetree@vger.kernel.org,
mka@chromium.org, kalyan_t@codeaurora.org,
Mark Rutland <mark.rutland@arm.com>,
linux-clk@vger.kernel.org, hoegsberg@chromium.org,
Douglas Anderson <dianders@chromium.org>,
Michael Turquette <mturquette@baylibre.com>,
linux-kernel@vger.kernel.org
Subject: [PATCH v4 06/15] clk: qcom: Use ARRAY_SIZE in dispcc-sc7180 for parent clocks
Date: Mon, 3 Feb 2020 10:31:39 -0800
Message-ID: <20200203103049.v4.6.If590c468722d2985cea63adf60c0d2b3098f37d9@changeid> (raw)
In-Reply-To: <20200203183149.73842-1-dianders@chromium.org>
It's nicer to use ARRAY_SIZE instead of hardcoding. Had we always
been doing this it would have prevented a previous bug. See commit
74c31ff9c84a ("clk: qcom: gpu_cc_gmu_clk_src has 5 parents, not 6").
Signed-off-by: Douglas Anderson <dianders@chromium.org>
---
Changes in v4: None
Changes in v3:
- Patch ("clk: qcom: Use ARRAY_SIZE in dispcc-sc7180...") split out for v3.
Changes in v2: None
drivers/clk/qcom/dispcc-sc7180.c | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/clk/qcom/dispcc-sc7180.c b/drivers/clk/qcom/dispcc-sc7180.c
index 397f5d9dafc8..dd7af41e47eb 100644
--- a/drivers/clk/qcom/dispcc-sc7180.c
+++ b/drivers/clk/qcom/dispcc-sc7180.c
@@ -154,7 +154,7 @@ static struct clk_rcg2 disp_cc_mdss_ahb_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_ahb_clk_src",
.parent_data = disp_cc_parent_data_4,
- .num_parents = 2,
+ .num_parents = ARRAY_SIZE(disp_cc_parent_data_4),
.flags = CLK_SET_RATE_PARENT,
.ops = &clk_rcg2_shared_ops,
},
@@ -168,7 +168,7 @@ static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_byte0_clk_src",
.parent_data = disp_cc_parent_data_2,
- .num_parents = 2,
+ .num_parents = ARRAY_SIZE(disp_cc_parent_data_2),
.flags = CLK_SET_RATE_PARENT,
.ops = &clk_byte2_ops,
},
@@ -188,7 +188,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_aux_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_dp_aux_clk_src",
.parent_data = disp_cc_parent_data_0,
- .num_parents = 2,
+ .num_parents = ARRAY_SIZE(disp_cc_parent_data_0),
.ops = &clk_rcg2_ops,
},
};
@@ -201,7 +201,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_crypto_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_dp_crypto_clk_src",
.parent_data = disp_cc_parent_data_1,
- .num_parents = 3,
+ .num_parents = ARRAY_SIZE(disp_cc_parent_data_1),
.flags = CLK_SET_RATE_PARENT,
.ops = &clk_byte2_ops,
},
@@ -215,7 +215,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_link_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_dp_link_clk_src",
.parent_data = disp_cc_parent_data_1,
- .num_parents = 3,
+ .num_parents = ARRAY_SIZE(disp_cc_parent_data_1),
.flags = CLK_SET_RATE_PARENT,
.ops = &clk_byte2_ops,
},
@@ -229,7 +229,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_pixel_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_dp_pixel_clk_src",
.parent_data = disp_cc_parent_data_1,
- .num_parents = 3,
+ .num_parents = ARRAY_SIZE(disp_cc_parent_data_1),
.flags = CLK_SET_RATE_PARENT,
.ops = &clk_dp_ops,
},
@@ -244,7 +244,7 @@ static struct clk_rcg2 disp_cc_mdss_esc0_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_esc0_clk_src",
.parent_data = disp_cc_parent_data_2,
- .num_parents = 2,
+ .num_parents = ARRAY_SIZE(disp_cc_parent_data_2),
.ops = &clk_rcg2_ops,
},
};
@@ -267,7 +267,7 @@ static struct clk_rcg2 disp_cc_mdss_mdp_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_mdp_clk_src",
.parent_data = disp_cc_parent_data_3,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(disp_cc_parent_data_3),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -280,7 +280,7 @@ static struct clk_rcg2 disp_cc_mdss_pclk0_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_pclk0_clk_src",
.parent_data = disp_cc_parent_data_5,
- .num_parents = 2,
+ .num_parents = ARRAY_SIZE(disp_cc_parent_data_5),
.flags = CLK_SET_RATE_PARENT,
.ops = &clk_pixel_ops,
},
@@ -295,7 +295,7 @@ static struct clk_rcg2 disp_cc_mdss_rot_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_rot_clk_src",
.parent_data = disp_cc_parent_data_3,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(disp_cc_parent_data_3),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -309,7 +309,7 @@ static struct clk_rcg2 disp_cc_mdss_vsync_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_vsync_clk_src",
.parent_data = disp_cc_parent_data_0,
- .num_parents = 1,
+ .num_parents = ARRAY_SIZE(disp_cc_parent_data_0),
.ops = &clk_rcg2_shared_ops,
},
};
--
2.25.0.341.g760bfbb309-goog
next prev parent reply index
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-03 18:31 [PATCH v4 00/15] clk: qcom: Fix parenting for dispcc/gpucc/videocc Douglas Anderson
2020-02-03 18:31 ` [PATCH v4 01/15] clk: qcom: rcg2: Don't crash if our parent can't be found; return an error Douglas Anderson
2020-02-04 17:47 ` Stephen Boyd
2020-02-03 18:31 ` [PATCH v4 02/15] dt-bindings: clock: Fix qcom,dispcc bindings for sdm845/sc7180 Douglas Anderson
2020-02-04 17:47 ` Stephen Boyd
2020-02-03 18:31 ` [PATCH v4 03/15] arm64: dts: qcom: sdm845: Add the missing clocks on the dispcc Douglas Anderson
2020-02-03 18:31 ` [PATCH v4 04/15] clk: qcom: Get rid of fallback global names for dispcc-sc7180 Douglas Anderson
2020-02-04 17:47 ` Stephen Boyd
2020-02-03 18:31 ` [PATCH v4 05/15] clk: qcom: Get rid of the test clock " Douglas Anderson
2020-02-04 17:47 ` Stephen Boyd
2020-02-03 18:31 ` Douglas Anderson [this message]
2020-02-04 17:48 ` [PATCH v4 06/15] clk: qcom: Use ARRAY_SIZE in dispcc-sc7180 for parent clocks Stephen Boyd
2020-02-03 18:31 ` [PATCH v4 07/15] dt-bindings: clock: Fix qcom,gpucc bindings for sdm845/sc7180/msm8998 Douglas Anderson
2020-02-04 17:48 ` Stephen Boyd
2020-02-03 18:31 ` [PATCH v4 08/15] arm64: dts: qcom: sdm845: Add missing clocks / fix names on the gpucc Douglas Anderson
2020-02-03 18:31 ` [PATCH v4 09/15] clk: qcom: Get rid of the test clock for gpucc-sc7180 Douglas Anderson
2020-02-04 17:48 ` Stephen Boyd
2020-02-03 18:31 ` [PATCH v4 10/15] clk: qcom: Use ARRAY_SIZE in gpucc-sc7180 for parent clocks Douglas Anderson
2020-02-04 17:48 ` Stephen Boyd
2020-02-03 18:31 ` [PATCH v4 11/15] dt-bindings: clock: Cleanup qcom,videocc bindings for sdm845/sc7180 Douglas Anderson
2020-02-04 17:48 ` Stephen Boyd
2020-02-04 20:49 ` Doug Anderson
2020-02-03 18:31 ` [PATCH v4 12/15] clk: qcom: Get rid of the test clock for videocc-sc7180 Douglas Anderson
2020-02-04 17:49 ` Stephen Boyd
2020-02-03 18:31 ` [PATCH v4 13/15] clk: qcom: Use ARRAY_SIZE in videocc-sc7180 for parent clocks Douglas Anderson
2020-02-04 17:49 ` Stephen Boyd
2020-02-03 18:31 ` [PATCH v4 14/15] arm64: dts: qcom: sdm845: Add the missing clock on the videocc Douglas Anderson
2020-02-03 18:31 ` [PATCH v4 15/15] arm64: dts: sc7180: Add clock controller nodes Douglas Anderson
2020-02-03 19:30 ` [PATCH v4 00/15] clk: qcom: Fix parenting for dispcc/gpucc/videocc Stephen Boyd
2020-02-03 19:41 ` Doug Anderson
2020-02-03 20:04 ` Bjorn Andersson
2020-02-03 20:48 ` Doug Anderson
2020-02-03 23:17 ` Bjorn Andersson
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