From: Vinod Koul <vkoul@kernel.org>
To: Stephen Boyd <sboyd@kernel.org>
Cc: agross@kernel.org, bjorn.andersson@linaro.org,
devicetree@vger.kernel.org, jshriram@codeaurora.org,
linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, mark.rutland@arm.com,
mturquette@baylibre.com, psodagud@codeaurora.org,
robh+dt@kernel.org, tdas@codeaurora.org, tsoni@codeaurora.org,
vnkgutta@codeaurora.org
Subject: Re: [PATCH v2 6/7] clk: qcom: gcc: Add global clock controller driver for SM8250
Date: Fri, 14 Feb 2020 18:39:23 +0530 [thread overview]
Message-ID: <20200214130923.GV2618@vkoul-mobl> (raw)
In-Reply-To: <20200205194022.C5E8C20730@mail.kernel.org>
On 05-02-20, 11:40, Stephen Boyd wrote:
> > +static const struct clk_parent_data gcc_parent_data_2[] = {
> > + { .fw_name = "bi_tcxo" },
> > + { .fw_name = "sleep_clk", .name = "sleep_clk" },
>
> Please drop .name
Yup, will do
> > +static const struct clk_parent_data gcc_parent_data_5[] = {
> > + { .fw_name = "bi_tcxo" },
> > + { .hw = &gpll0.clkr.hw },
> > + { .fw_name = "aud_ref_clk", .name = "aud_ref_clk" },
>
> Why have .name? Pleas remove it.
Dropped...
> > + { .hw = &gpll0_out_even.clkr.hw },
> > + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" },
>
> Please drop these test inputs. I don't see any reason why they're listed.
Dropped this and rest.
> > +static struct clk_branch gcc_sys_noc_cpuss_ahb_clk = {
> > + .halt_reg = 0x48198,
> > + .halt_check = BRANCH_HALT_VOTED,
> > + .clkr = {
> > + .enable_reg = 0x52000,
> > + .enable_mask = BIT(0),
> > + .hw.init = &(struct clk_init_data){
> > + .name = "gcc_sys_noc_cpuss_ahb_clk",
> > + .parent_data = &(const struct clk_parent_data){
> > + .hw = &gcc_cpuss_ahb_postdiv_clk_src.clkr.hw,
> > + },
> > + .num_parents = 1,
> > + .flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT,
> > + .ops = &clk_branch2_ops,
> > + },
> > + },
> > +};
>
> Is there a need for this clk to be exposed? Why can't we just turn the
> bit on in probe and ignore it after that? I'd prefer to not have
> CLK_IS_CRITICAL in this driver unless necessary.
yeah moved it as setting a bit in probe..
> > + /*
> > + * Keep the clocks always-ON
> > + * GCC_VIDEO_AHB_CLK, GCC_CAMERA_AHB_CLK, GCC_DISP_AHB_CLK,
> > + * GCC_CPUSS_DVM_BUS_CLK, GCC_GPU_CFG_AHB_CLK
> > + */
> > + regmap_update_bits(regmap, 0x0b004, BIT(0), BIT(0));
> > + regmap_update_bits(regmap, 0x0b008, BIT(0), BIT(0));
> > + regmap_update_bits(regmap, 0x0b00c, BIT(0), BIT(0));
> > + regmap_update_bits(regmap, 0x4818c, BIT(0), BIT(0));
> > + regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0));
>
> These look like the AHB clks above that we just enabled and then ignore.
right, I think these are rest of the always-on clocks
--
~Vinod
prev parent reply other threads:[~2020-02-14 13:09 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-24 22:32 [PATCH v2 0/7] Add device tree and clock drivers for SM8250 SoC Venkata Narendra Kumar Gutta
2020-01-24 22:32 ` [PATCH v2 1/7] dt-bindings: clock: Add RPMHCC bindings for SM8250 Venkata Narendra Kumar Gutta
2020-02-12 23:05 ` Stephen Boyd
2020-01-24 22:32 ` [PATCH v2 2/7] clk: qcom: rpmh: Add support for RPMH clocks on SM8250 Venkata Narendra Kumar Gutta
2020-02-12 23:05 ` Stephen Boyd
2020-01-24 22:32 ` [PATCH v2 3/7] clk: qcom: clk-alpha-pll: Refactor and cleanup trion PLL Venkata Narendra Kumar Gutta
2020-02-12 23:09 ` Stephen Boyd
2020-01-24 22:32 ` [PATCH v2 4/7] clk: qcom: clk-alpha-pll: Add support for controlling Lucid PLLs Venkata Narendra Kumar Gutta
2020-02-05 19:33 ` Stephen Boyd
2020-02-10 5:56 ` Vinod Koul
2020-01-24 22:32 ` [PATCH v2 5/7] dt-bindings: clock: Add SM8250 GCC clock bindings Venkata Narendra Kumar Gutta
2020-02-04 7:13 ` Stephen Boyd
2020-01-24 22:32 ` [PATCH v2 7/7] arm64: dts: qcom: sm8250: Add sm8250 dts file Venkata Narendra Kumar Gutta
2020-01-24 22:49 ` Bjorn Andersson
2020-02-05 19:47 ` Stephen Boyd
2020-02-14 13:14 ` Vinod Koul
[not found] ` <1579905147-12142-7-git-send-email-vnkgutta@codeaurora.org>
2020-02-05 19:40 ` [PATCH v2 6/7] clk: qcom: gcc: Add global clock controller driver for SM8250 Stephen Boyd
2020-02-14 13:09 ` Vinod Koul [this message]
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