From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.4 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69C5CC3567B for ; Thu, 27 Feb 2020 17:03:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1EBFD2469F for ; Thu, 27 Feb 2020 17:03:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="VIkHqSxt" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729791AbgB0RDg (ORCPT ); Thu, 27 Feb 2020 12:03:36 -0500 Received: from mail-pj1-f67.google.com ([209.85.216.67]:36066 "EHLO mail-pj1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729481AbgB0RDg (ORCPT ); Thu, 27 Feb 2020 12:03:36 -0500 Received: by mail-pj1-f67.google.com with SMTP id gv17so47405pjb.1 for ; Thu, 27 Feb 2020 09:03:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=yBJPiQ0lbOVfSLOfY+tNxn+dKqPwPLLFFEsiwvstDG8=; b=VIkHqSxtex3FQfqYTBYAEyUYzs4GfsPK7twrZmzNnW2uF4wz1iqcviGBGKwwHz0LAd wGBKikXRXJZnQEvd8NZUDZmgqFTtDQwCx1Yni4y6v9uvK8eIZveVsxTVsfKpgOc8vVFI 2KiI/ort/NLB+sXBdP6Whe4VXi8nI3AhfuiYI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=yBJPiQ0lbOVfSLOfY+tNxn+dKqPwPLLFFEsiwvstDG8=; b=CN+aV2yun+cw+1Gh9bFbVhTsFXo9xa7k/ttlGHbtkxk3+fvntaDX9aB2pFaxYgrkMi huPHiPdzJoAp/6t4fNAgvLiyFoWvF0bxTcOIoN8OibI58ZpxelqXlftaH5rehGbvsEl8 iI3UkhktcQaWEzQETzaK+aVCi5wu7vS1w74KBJDIEu9Qa9EZXTuY/0Qlsm9Gv4zKsKWn ATHhK77EO7ETJ0Foh6xG7Xe3oozIAob8XD1yT7Fb005I5UCTFfqbrg79HtZ7czZgIYKQ iTwZFb01NlzOpp3VHuPNIaGoAxjm5s9cTBjLRijpGOAbOzY2xB5SN+BY14fBi6eNpi5d ArZQ== X-Gm-Message-State: APjAAAULtTUC6IBWWY3XzkV518wt2tsjI9lvAH3S7tIYJ5NcMDAfmmG+ wm74Wrsb9++u5bsI056rtB7NaA== X-Google-Smtp-Source: APXvYqygcAgUdRICx2ZrdIZaI2UzMLhgNb1ZAocwo8lrdXQ8MRvWXJbsnxOlMRUCZrE0zxwR9sWLJw== X-Received: by 2002:a17:90a:266f:: with SMTP id l102mr667858pje.67.1582823012069; Thu, 27 Feb 2020 09:03:32 -0800 (PST) Received: from localhost ([2620:15c:202:1:4fff:7a6b:a335:8fde]) by smtp.gmail.com with ESMTPSA id y190sm8061108pfb.82.2020.02.27.09.03.30 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 27 Feb 2020 09:03:31 -0800 (PST) Date: Thu, 27 Feb 2020 09:03:29 -0800 From: Matthias Kaehlcke To: Amit Kucheria Cc: Akash Asthana , Greg Kroah-Hartman , Andy Gross , Bjorn Andersson , wsa@the-dreams.de, broonie@kernel.org, Mark Rutland , Rob Herring , linux-i2c@vger.kernel.org, linux-spi@vger.kernel.org, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Stephen Boyd , mgautam@codeaurora.org, linux-arm-msm , linux-serial@vger.kernel.org, Douglas Anderson Subject: Re: [PATCH 6/6] arm64: dts: sc7180: Add interconnect for QUP and QSPI Message-ID: <20200227170329.GI24720@google.com> References: <1581946205-27189-1-git-send-email-akashast@codeaurora.org> <1581946205-27189-7-git-send-email-akashast@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hi Amit, the following include is missing: #include It was added in v2 of "arm64: dts: sc7180: Add interconnect provider DT. nodes", but removed in later versions. v2 had a comment requesting to move the include one line up, my guess is it got lost while doing that. On Thu, Feb 27, 2020 at 05:41:03PM +0530, Amit Kucheria wrote: > Hi Akash, > > > On Mon, Feb 17, 2020 at 7:01 PM Akash Asthana wrote: > > > > Add interconnect ports for GENI QUPs and QSPI to set bus capabilities. > > > > Signed-off-by: Akash Asthana > > --- > > Note: > > - This patch depends on series https://patchwork.kernel.org/cover/11313817/ > > [Add SC7180 interconnect provider driver]. It won't compile without that. > > I've tried picking up v4 of Odelu's series to add the SC7180 but I'm > still unable to compile this. I see the following error: > > Error: /home/amit/work/sources/worktree-review-pipeline/arch/arm64/boot/dts/qcom/sc7180.dtsi:353.32-33 > syntax error > FATAL ERROR: Unable to parse input tree > make[3]: *** [scripts/Makefile.lib:296: > arch/arm64/boot/dts/qcom/sc7180-idp.dtb] Error 1 > > As part of picking up the dependencies, I've pulled the following > series on top of v5.6-rc2: > > - https://lore.kernel.org/r/1581932974-21654-2-git-send-email-akashast@codeaurora.org > - https://lore.kernel.org/r/1581932212-19469-2-git-send-email-akashast@codeaurora.org > - https://lore.kernel.org/r/1581946205-27189-2-git-send-email-akashast@codeaurora.org > - https://lore.kernel.org/r/1582646384-1458-2-git-send-email-okukatla@codeaurora.org > - https://lore.kernel.org/r/20200209183411.17195-2-sibis@codeaurora.org > > What am I missing? > > I've pushed the aggregate branch here for convenience: > https://git.linaro.org/people/amit.kucheria/kernel.git/log/ > > Regards, > Amit > > > arch/arm64/boot/dts/qcom/sc7180.dtsi | 199 +++++++++++++++++++++++++++++++++++ > > 1 file changed, 199 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > > index cc5a94f..04569c9 100644 > > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > > @@ -352,6 +352,14 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > > + &qup_virt SLAVE_QUP_CORE_0>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_0>, > > + <&aggre1_noc MASTER_QUP_0 > > + &mc_virt SLAVE_EBI1>; > > + interconnect-names = "qup-core", "qup-config", > > + "qup-memory"; > > status = "disabled"; > > }; > > > > @@ -365,6 +373,11 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > > + &qup_virt SLAVE_QUP_CORE_0>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_0>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > > > @@ -376,6 +389,11 @@ > > pinctrl-names = "default"; > > pinctrl-0 = <&qup_uart0_default>; > > interrupts = ; > > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > > + &qup_virt SLAVE_QUP_CORE_0>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_0>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > > > @@ -389,6 +407,14 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > > + &qup_virt SLAVE_QUP_CORE_0>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_0>, > > + <&aggre1_noc MASTER_QUP_0 > > + &mc_virt SLAVE_EBI1>; > > + interconnect-names = "qup-core", "qup-config", > > + "qup-memory"; > > status = "disabled"; > > }; > > > > @@ -402,6 +428,11 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > > + &qup_virt SLAVE_QUP_CORE_0>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_0>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > > > @@ -413,6 +444,11 @@ > > pinctrl-names = "default"; > > pinctrl-0 = <&qup_uart1_default>; > > interrupts = ; > > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > > + &qup_virt SLAVE_QUP_CORE_0>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_0>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > > > @@ -426,6 +462,14 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > > + &qup_virt SLAVE_QUP_CORE_0>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_0>, > > + <&aggre1_noc MASTER_QUP_0 > > + &mc_virt SLAVE_EBI1>; > > + interconnect-names = "qup-core", "qup-config", > > + "qup-memory"; > > status = "disabled"; > > }; > > > > @@ -437,6 +481,11 @@ > > pinctrl-names = "default"; > > pinctrl-0 = <&qup_uart2_default>; > > interrupts = ; > > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > > + &qup_virt SLAVE_QUP_CORE_0>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_0>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > > > @@ -450,6 +499,14 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > > + &qup_virt SLAVE_QUP_CORE_0>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_0>, > > + <&aggre1_noc MASTER_QUP_0 > > + &mc_virt SLAVE_EBI1>; > > + interconnect-names = "qup-core", "qup-config", > > + "qup-memory"; > > status = "disabled"; > > }; > > > > @@ -463,6 +520,11 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > > + &qup_virt SLAVE_QUP_CORE_0>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_0>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > > > @@ -474,6 +536,11 @@ > > pinctrl-names = "default"; > > pinctrl-0 = <&qup_uart3_default>; > > interrupts = ; > > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > > + &qup_virt SLAVE_QUP_CORE_0>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_0>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > > > @@ -487,6 +554,14 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > > + &qup_virt SLAVE_QUP_CORE_0>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_0>, > > + <&aggre1_noc MASTER_QUP_0 > > + &mc_virt SLAVE_EBI1>; > > + interconnect-names = "qup-core", "qup-config", > > + "qup-memory"; > > status = "disabled"; > > }; > > > > @@ -498,6 +573,11 @@ > > pinctrl-names = "default"; > > pinctrl-0 = <&qup_uart4_default>; > > interrupts = ; > > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > > + &qup_virt SLAVE_QUP_CORE_0>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_0>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > > > @@ -511,6 +591,14 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > > + &qup_virt SLAVE_QUP_CORE_0>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_0>, > > + <&aggre1_noc MASTER_QUP_0 > > + &mc_virt SLAVE_EBI1>; > > + interconnect-names = "qup-core", "qup-config", > > + "qup-memory"; > > status = "disabled"; > > }; > > > > @@ -524,6 +612,11 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > > + &qup_virt SLAVE_QUP_CORE_0>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_0>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > > > @@ -535,6 +628,11 @@ > > pinctrl-names = "default"; > > pinctrl-0 = <&qup_uart5_default>; > > interrupts = ; > > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > > + &qup_virt SLAVE_QUP_CORE_0>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_0>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > }; > > @@ -561,6 +659,14 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > > + &qup_virt SLAVE_QUP_CORE_1>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_1>, > > + <&aggre2_noc MASTER_QUP_1 > > + &mc_virt SLAVE_EBI1>; > > + interconnect-names = "qup-core", "qup-config", > > + "qup-memory"; > > status = "disabled"; > > }; > > > > @@ -574,6 +680,11 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > > + &qup_virt SLAVE_QUP_CORE_1>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_1>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > > > @@ -585,6 +696,11 @@ > > pinctrl-names = "default"; > > pinctrl-0 = <&qup_uart6_default>; > > interrupts = ; > > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > > + &qup_virt SLAVE_QUP_CORE_1>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_1>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > > > @@ -598,6 +714,14 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > > + &qup_virt SLAVE_QUP_CORE_1>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_1>, > > + <&aggre2_noc MASTER_QUP_1 > > + &mc_virt SLAVE_EBI1>; > > + interconnect-names = "qup-core", "qup-config", > > + "qup-memory"; > > status = "disabled"; > > }; > > > > @@ -609,6 +733,11 @@ > > pinctrl-names = "default"; > > pinctrl-0 = <&qup_uart7_default>; > > interrupts = ; > > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > > + &qup_virt SLAVE_QUP_CORE_1>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_1>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > > > @@ -622,6 +751,14 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > > + &qup_virt SLAVE_QUP_CORE_1>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_1>, > > + <&aggre2_noc MASTER_QUP_1 > > + &mc_virt SLAVE_EBI1>; > > + interconnect-names = "qup-core", "qup-config", > > + "qup-memory"; > > status = "disabled"; > > }; > > > > @@ -635,6 +772,11 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > > + &qup_virt SLAVE_QUP_CORE_1>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_1>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > > > @@ -646,6 +788,11 @@ > > pinctrl-names = "default"; > > pinctrl-0 = <&qup_uart8_default>; > > interrupts = ; > > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > > + &qup_virt SLAVE_QUP_CORE_1>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_1>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > > > @@ -659,6 +806,14 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > > + &qup_virt SLAVE_QUP_CORE_1>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_1>, > > + <&aggre2_noc MASTER_QUP_1 > > + &mc_virt SLAVE_EBI1>; > > + interconnect-names = "qup-core", "qup-config", > > + "qup-memory"; > > status = "disabled"; > > }; > > > > @@ -670,6 +825,11 @@ > > pinctrl-names = "default"; > > pinctrl-0 = <&qup_uart9_default>; > > interrupts = ; > > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > > + &qup_virt SLAVE_QUP_CORE_1>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_1>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > > > @@ -683,6 +843,14 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > > + &qup_virt SLAVE_QUP_CORE_1>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_1>, > > + <&aggre2_noc MASTER_QUP_1 > > + &mc_virt SLAVE_EBI1>; > > + interconnect-names = "qup-core", "qup-config", > > + "qup-memory"; > > status = "disabled"; > > }; > > > > @@ -696,6 +864,11 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > > + &qup_virt SLAVE_QUP_CORE_1>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_1>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > > > @@ -707,6 +880,11 @@ > > pinctrl-names = "default"; > > pinctrl-0 = <&qup_uart10_default>; > > interrupts = ; > > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > > + &qup_virt SLAVE_QUP_CORE_1>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_1>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > > > @@ -720,6 +898,14 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > > + &qup_virt SLAVE_QUP_CORE_1>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_1>, > > + <&aggre2_noc MASTER_QUP_1 > > + &mc_virt SLAVE_EBI1>; > > + interconnect-names = "qup-core", "qup-config", > > + "qup-memory"; > > status = "disabled"; > > }; > > > > @@ -733,6 +919,11 @@ > > interrupts = ; > > #address-cells = <1>; > > #size-cells = <0>; > > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > > + &qup_virt SLAVE_QUP_CORE_1>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_1>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > > > @@ -744,6 +935,11 @@ > > pinctrl-names = "default"; > > pinctrl-0 = <&qup_uart11_default>; > > interrupts = ; > > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > > + &qup_virt SLAVE_QUP_CORE_1>, > > + <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QUP_1>; > > + interconnect-names = "qup-core", "qup-config"; > > status = "disabled"; > > }; > > }; > > @@ -1051,6 +1247,9 @@ > > clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>, > > <&gcc GCC_QSPI_CORE_CLK>; > > clock-names = "iface", "core"; > > + interconnects = <&gem_noc MASTER_APPSS_PROC > > + &config_noc SLAVE_QSPI_0>; > > + interconnect-names = "qspi-config"; > > status = "disabled"; > > }; > > > > -- > > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project