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* [PATCH] clk: qcom: gcc: Fix parent for gpll0_out_even
@ 2020-05-21  5:27 Vinod Koul
  2020-05-21  5:31 ` Bjorn Andersson
  2020-05-27  0:15 ` Stephen Boyd
  0 siblings, 2 replies; 3+ messages in thread
From: Vinod Koul @ 2020-05-21  5:27 UTC (permalink / raw)
  To: Michael Turquette, Stephen Boyd
  Cc: linux-arm-msm, Bjorn Andersson, Vinod Koul, Andy Gross,
	Deepak Katragadda, Taniya Das, Jonathan Marek, linux-clk,
	linux-kernel

Documentation says that gpll0 is parent of gpll0_out_even, somehow
driver coded that as bi_tcxo, so fix it

Fixes: 2a1d7eb854bb ("clk: qcom: gcc: Add global clock controller driver for SM8150")
Reported-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 drivers/clk/qcom/gcc-sm8150.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c
index 2bc08e7125bf..72524cf11048 100644
--- a/drivers/clk/qcom/gcc-sm8150.c
+++ b/drivers/clk/qcom/gcc-sm8150.c
@@ -76,8 +76,7 @@ static struct clk_alpha_pll_postdiv gpll0_out_even = {
 	.clkr.hw.init = &(struct clk_init_data){
 		.name = "gpll0_out_even",
 		.parent_data = &(const struct clk_parent_data){
-			.fw_name = "bi_tcxo",
-			.name = "bi_tcxo",
+			.hw = &gpll0.clkr.hw,
 		},
 		.num_parents = 1,
 		.ops = &clk_trion_pll_postdiv_ops,
-- 
2.25.4


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2020-05-21  5:27 [PATCH] clk: qcom: gcc: Fix parent for gpll0_out_even Vinod Koul
2020-05-21  5:31 ` Bjorn Andersson
2020-05-27  0:15 ` Stephen Boyd

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