From: Konrad Dybcio <konradybcio@gmail.com>
To: konradybcio@gmail.com
Cc: martin.botka1@gmail.com, Rob Clark <robdclark@gmail.com>,
Sean Paul <sean@poorly.run>, David Airlie <airlied@linux.ie>,
Daniel Vetter <daniel@ffwll.ch>, Rob Herring <robh+dt@kernel.org>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Vinod Koul <vkoul@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Felipe Balbi <balbi@kernel.org>,
Jordan Crouse <jcrouse@codeaurora.org>,
zhengbin <zhengbin13@huawei.com>,
Jeffrey Hugo <jeffrey.l.hugo@gmail.com>,
AngeloGioacchino Del Regno <kholk11@gmail.com>,
Ben Dooks <ben.dooks@codethink.co.uk>,
Krzysztof Wilczynski <kw@linux.com>,
Harigovindan P <harigovi@codeaurora.org>,
Brian Masney <masneyb@onstation.org>,
Sam Ravnborg <sam@ravnborg.org>,
Xiaozhe Shi <xiaozhes@codeaurora.org>,
Manu Gautam <mgautam@codeaurora.org>,
linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org,
linux-clk@vger.kernel.org
Subject: [PATCH 4/9] drm/msm/dsi: Add phy configuration for SDM630/636/660
Date: Sun, 26 Jul 2020 13:12:01 +0200 [thread overview]
Message-ID: <20200726111215.22361-5-konradybcio@gmail.com> (raw)
In-Reply-To: <20200726111215.22361-1-konradybcio@gmail.com>
These SoCs make use of the 14nm phy, but at different
addresses than other 14nm units.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
---
.../devicetree/bindings/display/msm/dsi.txt | 1 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 18 ++++++++++++++++++
4 files changed, 22 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt b/Documentation/devicetree/bindings/display/msm/dsi.txt
index af95586c898f..7884fd7a85c1 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi.txt
+++ b/Documentation/devicetree/bindings/display/msm/dsi.txt
@@ -87,6 +87,7 @@ Required properties:
* "qcom,dsi-phy-20nm"
* "qcom,dsi-phy-28nm-8960"
* "qcom,dsi-phy-14nm"
+ * "qcom,dsi-phy-14nm-660"
* "qcom,dsi-phy-10nm"
* "qcom,dsi-phy-10nm-8998"
- reg: Physical base address and length of the registers of PLL, PHY. Some
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
index f509ebd77500..009f5b843dd1 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
@@ -499,6 +499,8 @@ static const struct of_device_id dsi_phy_dt_match[] = {
#ifdef CONFIG_DRM_MSM_DSI_14NM_PHY
{ .compatible = "qcom,dsi-phy-14nm",
.data = &dsi_phy_14nm_cfgs },
+ { .compatible = "qcom,dsi-phy-14nm-660",
+ .data = &dsi_phy_14nm_660_cfgs },
#endif
#ifdef CONFIG_DRM_MSM_DSI_10NM_PHY
{ .compatible = "qcom,dsi-phy-10nm",
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
index 24b294ed3059..ef8672d7b123 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
@@ -45,6 +45,7 @@ extern const struct msm_dsi_phy_cfg dsi_phy_28nm_lp_cfgs;
extern const struct msm_dsi_phy_cfg dsi_phy_20nm_cfgs;
extern const struct msm_dsi_phy_cfg dsi_phy_28nm_8960_cfgs;
extern const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs;
+extern const struct msm_dsi_phy_cfg dsi_phy_14nm_660_cfgs;
extern const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs;
extern const struct msm_dsi_phy_cfg dsi_phy_10nm_8998_cfgs;
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
index 1594f1422372..519400501bcd 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
@@ -161,3 +161,21 @@ const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs = {
.io_start = { 0x994400, 0x996400 },
.num_dsi_phy = 2,
};
+
+const struct msm_dsi_phy_cfg dsi_phy_14nm_660_cfgs = {
+ .type = MSM_DSI_PHY_14NM,
+ .src_pll_truthtable = { {false, false}, {true, false} },
+ .reg_cfg = {
+ .num = 1,
+ .regs = {
+ {"vcca", 17000, 32},
+ },
+ },
+ .ops = {
+ .enable = dsi_14nm_phy_enable,
+ .disable = dsi_14nm_phy_disable,
+ .init = dsi_14nm_phy_init,
+ },
+ .io_start = { 0xc994400, 0xc996000 },
+ .num_dsi_phy = 2,
+};
--
2.27.0
next prev parent reply other threads:[~2020-07-26 11:14 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-26 11:11 [PATCH 0/9] SDM630/36/60 driver enablement Konrad Dybcio
2020-07-26 11:11 ` [PATCH 1/9] clk: qcom: gcc-sdm660: Add missing modem reset Konrad Dybcio
[not found] ` <159587899589.1360974.4403082749390843157@swboyd.mtv.corp.google.com>
2020-07-27 19:58 ` Konrad Dybcio
2020-07-26 11:11 ` [PATCH 2/9] phy: qcom-qusb2: Add support for SDM630/660 Konrad Dybcio
2020-07-31 20:26 ` Rob Herring
2020-07-26 11:12 ` [PATCH 3/9] drivers: usb: dwc3-qcom: Add sdm660 compatible Konrad Dybcio
2020-07-31 20:26 ` Rob Herring
2020-07-26 11:12 ` Konrad Dybcio [this message]
2020-08-03 11:00 ` [PATCH 4/9] drm/msm/dsi: Add phy configuration for SDM630/636/660 Vinod Koul
2020-08-03 16:06 ` Rob Clark
2020-08-04 12:09 ` Vinod Koul
2020-08-04 14:49 ` Rob Clark
2020-07-26 11:12 ` [PATCH 5/9] drm/msm/mdp5: Add MDP5 configuration for SDM630 Konrad Dybcio
2020-07-26 11:12 ` [PATCH 6/9] drm/msm/dsi: Add DSI configuration for SDM660 Konrad Dybcio
2020-07-26 11:12 ` [PATCH 7/9] drm/msm/mdp5: Add MDP5 configuration for SDM636/660 Konrad Dybcio
2020-07-26 11:12 ` [PATCH 8/9] clk: qcom: gcc-sdm660: Fix up gcc_mss_mnoc_bimc_axi_clk Konrad Dybcio
[not found] ` <159587887102.1360974.16083886481437183810@swboyd.mtv.corp.google.com>
2020-07-27 19:58 ` Konrad Dybcio
2020-07-26 11:12 ` [PATCH 9/9] soc/qcom: Add REVID driver Konrad Dybcio
2020-07-26 11:29 ` Greg Kroah-Hartman
2020-07-26 11:40 ` Konrad Dybcio
2020-07-26 12:04 ` Greg Kroah-Hartman
2020-07-27 18:13 ` Rob Herring
2020-07-27 18:13 ` Rob Herring
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