Re: [PATCH v4] bus: mhi: Add MHI PCI support for WWAN modems

[Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>]

Hi Loic,

On Wed, Oct 21, 2020 at 06:06:25PM +0200, Loic Poulain wrote:
> Hi Mani,
> 
> On Wed, 21 Oct 2020 at 17:20, Manivannan Sadhasivam
> <manivannan.sadhasivam@linaro.org> wrote:
> >
> > On Mon, Oct 19, 2020 at 02:00:44PM +0200, Loic Poulain wrote:
> > > This is a generic MHI-over-PCI controller driver for MHI only devices
> > > such as QCOM modems. For now it supports registering of Qualcomm SDX55
> > > based PCIe modules. The MHI channels have been extracted from mhi
> > > downstream driver.
> > >
> > > This driver is for MHI-only devices which have all functionnalities
> >
> > s/functionnalities/functionalities
> >
> > > exposed through MHI channels and accessed by the corresponding MHI
> > > device drivers (no out-of-band communication).
> > >
> > > Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
> > > ---
> > >  v2: - remove useless delay.h include
> > >      - remove over-logging on error
> > >      - remove controller subdir
> > >      - rename to mhi_pci_modem.c
> > >      - Fix mhi_pci_probe exit path on error
> > >      - expand module description
> > >      - drop module version
> > >  v3: - Rename to mhi_pci_generic
> > >      - Add hardware accelerated IP channel (IPA)
> > >      - Added fw/edl names for sdx55m
> > >  v4: - Configurable dma width access
> > >      - Configurable PCI BAR number (default is 0)
> > >
> > >  drivers/bus/mhi/Kconfig           |   9 +
> > >  drivers/bus/mhi/Makefile          |   3 +
> > >  drivers/bus/mhi/mhi_pci_generic.c | 336 ++++++++++++++++++++++++++++++++++++++
> > >  3 files changed, 348 insertions(+)
> > >  create mode 100644 drivers/bus/mhi/mhi_pci_generic.c
> > >
> > > diff --git a/drivers/bus/mhi/Kconfig b/drivers/bus/mhi/Kconfig
> > > index e841c10..daa8528 100644
> > > --- a/drivers/bus/mhi/Kconfig
> > > +++ b/drivers/bus/mhi/Kconfig
> > > @@ -20,3 +20,12 @@ config MHI_BUS_DEBUG
> > >         Enable debugfs support for use with the MHI transport. Allows
> > >         reading and/or modifying some values within the MHI controller
> > >         for debug and test purposes.
> > > +
> > > +config MHI_BUS_PCI_GENERIC
> > > +     tristate "MHI PCI controller driver"
> > > +     depends on MHI_BUS
> > > +     depends on PCI
> > > +     help
> > > +       This driver provides Modem Host Interface (MHI) PCI controller driver
> >
> > No need to expand MHI here. It is already done in CONFIG_MHI_BUS.
> >
> > > +       for devices such as Qualcomm SDX55 based PCIe modems.
> > > +
> > > diff --git a/drivers/bus/mhi/Makefile b/drivers/bus/mhi/Makefile
> > > index 19e6443..d1a4ef3 100644
> > > --- a/drivers/bus/mhi/Makefile
> > > +++ b/drivers/bus/mhi/Makefile
> > > @@ -1,2 +1,5 @@
> > >  # core layer
> > >  obj-y += core/
> > > +
> > > +obj-$(CONFIG_MHI_BUS_PCI_GENERIC) := mhi_pci_generic.o
> >
> > The driver is already under bus/mhi so no need of mhi_ prefix here.
> >
> > > +
> > > diff --git a/drivers/bus/mhi/mhi_pci_generic.c b/drivers/bus/mhi/mhi_pci_generic.c
> > > new file mode 100644
> > > index 0000000..dcd6c1a
> > > --- /dev/null
> > > +++ b/drivers/bus/mhi/mhi_pci_generic.c
> > > @@ -0,0 +1,336 @@
> > > +// SPDX-License-Identifier: GPL-2.0-or-later
> > > +/*
> > > + * MHI PCI driver - MHI over PCI controller driver
> > > + *
> > > + * This module is a generic driver for registering MHI-over-PCI devices,
> > > + * such as PCIe QCOM modems.
> > > + *
> > > + * Copyright (C) 2020 Linaro Ltd <loic.poulain@linaro.org>
> >
> > Is this driver completely written from scratch? If not then you need to provide
> > the copyright in downstream.
> 
> Yes, the code itself has been written from scratch, though some
> information, like channel IDs come from downstream parts.
> 

Okay, then it is fine.

> >
> >
> > > + */

[...]

> > > +
> > > +static int mhi_pci_get_irqs(struct mhi_controller *mhic,
> > > +                         const struct mhi_controller_config *mhic_config)
> > > +{
> > > +     struct pci_dev *pdev = to_pci_dev(mhic->cntrl_dev);
> > > +     int nr_vectors, i;
> > > +     int *irq;
> > > +
> > > +     /*
> > > +      * Alloc one MSI vector for BHI + one vector per event ring, ideally...
> > > +      * No explicit pci_free_irq_vectors required, done by pcim_release.
> > > +      */
> > > +     mhic->nr_irqs = 1 + mhic_config->num_events;
> > > +
> > > +     nr_vectors = pci_alloc_irq_vectors(pdev, 1, mhic->nr_irqs, PCI_IRQ_MSI);
> > > +     if (nr_vectors < 0) {
> > > +             dev_err(&pdev->dev, "Error allocating MSI vectors %d\n",
> > > +                     nr_vectors);
> > > +             return nr_vectors;
> > > +     }
> > > +
> > > +     if (nr_vectors < mhic->nr_irqs) {
> > > +             dev_warn(&pdev->dev, "Not enough MSI vectors (%d/%d)\n",
> > > +                      nr_vectors, mhic_config->num_events);
> > > +             /* continue... use shared IRQ */
> >
> > Perhaps add this info to the warning as well?
> >
> > > +     }
> > > +
> > > +     irq = devm_kcalloc(&pdev->dev, mhic->nr_irqs, sizeof(int), GFP_KERNEL);
> >
> > So you're allocating 'mhic->nr_irqs' even for (nr_vectors < mhic->nr_irqs) case?
> 
> Yes, simply because I want to keep mhi_event_config which contains IRQ
> IDs is constant (and would like to keep it constant).
> That allows a simple matching between ring ID and interrupt ID.
> 

Okay.

> >
> > > +     if (!irq)
> > > +             return -ENOMEM;
> > > +
> > > +     for (i = 0; i < mhic->nr_irqs; i++) {
> > > +             int vector = i >= nr_vectors ? (nr_vectors - 1) : i;
> > > +
> > > +             irq[i] = pci_irq_vector(pdev, vector);
> > > +     }
> > > +
> > > +     mhic->irq = irq;
> > > +
> > > +     return 0;
> > > +}
> > > +
> > > +static int mhi_pci_runtime_get(struct mhi_controller *mhi_cntrl)
> > > +{
> > > +     /* no PM for now */
> > > +     return 0;
> > > +}
> > > +
> > > +static void mhi_pci_runtime_put(struct mhi_controller *mhi_cntrl)
> > > +{
> > > +     /* no PM for now */
> > > +     return;
> > > +}
> > > +
> > > +static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> > > +{
> > > +     const struct mhi_pci_dev_info *info = (struct mhi_pci_dev_info *) id->driver_data;
> > > +     const struct mhi_controller_config *mhic_config;
> >
> > s/mhic_config/mhi_config
> >
> > > +     struct mhi_controller *mhic;
> > > +     int err;
> > > +
> > > +     dev_info(&pdev->dev, "MHI PCI device found: %s\n", info->name);
> >
> > Make it dev_dbg.
> >
> > > +
> > > +     mhic = devm_kzalloc(&pdev->dev, sizeof(*mhic), GFP_KERNEL);
> >
> > You should use mhi_alloc_controller() API for allocating the controller struct.
> > but then you need to free it in error paths as well...
> 
> TBH, not sure what is the point of using mhi_alloc_controller, since
> kzalloc allows
> zeroed allocation as well, and devm is so useful.
> 

I agree but the intention is not to depend on the controller drivers to zero out
the structure. The stack makes the assumption that the structure is zeroed out,
so anything not doing so will create serious issues.

Thanks,
Mani

> Regards,
> Loic