From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11CA8C55178 for ; Mon, 2 Nov 2020 17:08:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id ABADF2231B for ; Mon, 2 Nov 2020 17:08:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="MAYT0R1F" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727185AbgKBRIh (ORCPT ); Mon, 2 Nov 2020 12:08:37 -0500 Received: from z5.mailgun.us ([104.130.96.5]:26289 "EHLO z5.mailgun.us" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727413AbgKBRIh (ORCPT ); Mon, 2 Nov 2020 12:08:37 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1604336916; h=In-Reply-To: Content-Type: MIME-Version: References: Message-ID: Subject: Cc: To: From: Date: Sender; bh=SAL9Z21PfWH8XRXmXiAkD5Twef6r/IdjwYPZ2uz0nHA=; b=MAYT0R1FUXCo4njhNZPwKhhXwzlQVB57eDj9NM3zK5wyFhwaCZlf5QpMoT+6Pi9EWA7fbzCf Di07oyNyzpgfRtS9wuRKIoTxuo8s65sdJY6oeODZGGsna1oGu3JK0TYdbvY8xtQQvTgQ5Wxo XamSdqw1LMaeZooNWfMGneJTslM= X-Mailgun-Sending-Ip: 104.130.96.5 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n02.prod.us-east-1.postgun.com with SMTP id 5fa03d0e8646b0f2686a0f78 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 02 Nov 2020 17:08:30 GMT Sender: jcrouse=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 6FC35C43391; Mon, 2 Nov 2020 17:08:29 +0000 (UTC) Received: from jcrouse1-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse) by smtp.codeaurora.org (Postfix) with ESMTPSA id AF89DC433C8; Mon, 2 Nov 2020 17:08:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org AF89DC433C8 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=jcrouse@codeaurora.org Date: Mon, 2 Nov 2020 10:08:23 -0700 From: Jordan Crouse To: Will Deacon Cc: linux-arm-msm@vger.kernel.org, Andy Gross , Bjorn Andersson , Greg Kroah-Hartman , Joerg Roedel , Krishna Reddy , Rob Clark , Rob Herring , Robin Murphy , Sai Prakash Ranjan , Sibi Sankar , Stephen Boyd , Vivek Gautam , devicetree@vger.kernel.org, iommu@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v18 0/4] iommu/arm-smmu: Add adreno-smmu implementation and bindings Message-ID: <20201102170823.GA1032@jcrouse1-lnx.qualcomm.com> Mail-Followup-To: Will Deacon , linux-arm-msm@vger.kernel.org, Andy Gross , Bjorn Andersson , Greg Kroah-Hartman , Joerg Roedel , Krishna Reddy , Rob Clark , Rob Herring , Robin Murphy , Sai Prakash Ranjan , Sibi Sankar , Stephen Boyd , Vivek Gautam , devicetree@vger.kernel.org, iommu@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20201027223408.469893-1-jcrouse@codeaurora.org> <20201029172607.GA30745@willie-the-truck> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201029172607.GA30745@willie-the-truck> User-Agent: Mutt/1.5.24 (2015-08-30) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Thu, Oct 29, 2020 at 05:26:08PM +0000, Will Deacon wrote: > On Tue, Oct 27, 2020 at 04:34:04PM -0600, Jordan Crouse wrote: > > This short series adds support for the adreno-smmu implementation of the > > arm-smmu driver and the device-tree bindings to turn on the implementation > > for the sm845 and sc7180 GPUs. These changes are the last ones needed to enable > > per-instance pagetables in the drm/msm driver. > > > > No deltas in this patchset since the last go-around for 5.10 [1]. > > > > [1] https://patchwork.freedesktop.org/series/81393/ > > > > Jordan Crouse (3): > > iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU > > dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU > > arm: dts: qcom: sm845: Set the compatible string for the GPU SMMU > > > > Rob Clark (1): > > iommu/arm-smmu: Add a way for implementations to influence SCTLR > > FYI: this patch (patch 4/4) doesn't seem to have made it anywhere (I don't > have it, and neither does the archive). > > Will Patch 4/4 was the bindings for sdm845 and I didn't explicitly add IOMMU to the CC list and so patman did what patman does. I'll resend. Jordan -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project